Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

fix bug for v4096-l8-b4 #423

Merged
merged 36 commits into from
Feb 2, 2024
Merged

fix bug for v4096-l8-b4 #423

merged 36 commits into from
Feb 2, 2024

Conversation

qinjun-li
Copy link
Contributor

@qinjun-li qinjun-li commented Jan 22, 2024 •
edited by Avimitin
Loading

No description provided.

@qinjun-li qinjun-li force-pushed the vl4096_debug branch 21 times, most recently from 0265937 to ab10f08 Compare January 25, 2024 05:30
@Avimitin Avimitin mentioned this pull request Jan 25, 2024
Closed
@qinjun-li
[rtl] Prevents the next instruction from entering the queue until the…
a3c0f64 
… previous instruction with the same index is completely dequeued.
@qinjun-li
[rtl] lastGroupForInstruction was calculated incorrectly.
4f33547
@qinjun-li
[rtl] vrf report ready need free record.
b4272f2
@qinjun-li
[rtl] Correct the mask on the boundary line.
3fe8fbd
@qinjun-li
[rtl] modify the calculation of overlap in slide.
29ef7c2
@qinjun-li
[rtl] Handle the boundary for mask source.
0443513
@qinjun-li
[rtl] fix unaligned vl for cross write.
7e4b5b7
@qinjun-li
[rtl] fix unaligned vl for load unit.
53752fe
@qinjun-li
[rtl] Add an additional set of cross-lane reads when vl misaligned.
729b864
@qinjun-li
[rtl] delete cross write queue arbiter.
87975e6
@qinjun-li
[rtl] fix offset for maskunit write.
b4184fd
@qinjun-li
[rtl] raw forward in mask write unit.
ae631cb
@qinjun-li
[rtl] skip read for vid.
5a0398c
@qinjun-li
[rtl] Need longer sew to calculate popcount.
157ac89
@qinjun-li
[config] There is a problem with config.
a32bcfb
@qinjun-li
[rtl] Fix bordersForMaskLogic for other unit.
a0819f9
@qinjun-li
[rtl] fix vl in load unit.
7b1bdcf
@qinjun-li
[rtl] Solve the problem that the data of cross write is still in the …
16a8740 
…slot but the target lane releases the vrf in advance.
@qinjun-li
[rtl] fix dataMask for reduce unit.
f9bf157
@qinjun-li
[rtl] fix misakigned for vlm/vsm.
b51b946
@qinjun-li
[rtl] fix misaligned vl for ffo.
756f8d0
@qinjun-li
[rtl] fix misaligned vl for vfredmax.
956f25c
@qinjun-li
[rtl] fix misaligned vl for vfredosum.
828a5bd
@qinjun-li
[rtl] fix bug for vfredmax/min.
94d8573
@qinjun-li
[rtl] long latency reduce need wait response.
b1a4b71
@sequencer sequencer merged commit ef96846 into master Feb 2, 2024
@sequencer sequencer deleted the vl4096_debug branch February 2, 2024 09:18
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers

@sequencer sequencer sequencer approved these changes

Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
3 participants
@qinjun-li @sequencer @Avimitin