Add evaluation cases #782
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Add evaluation cases #782
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sequencer
reviewed
Oct 6, 2024
tests/eval/ooo_wb/ooo_wb.S
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| vadd.vi v8, v8, 1 | ||
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| # scaler workload | ||
| lw t4, 0(t1) |
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lw t4, 0(t1) will block vle8.v v8, (t1)
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V-V(mem)
indexed load to v1, then execute some how vector instructions not depending on v1, then use v1 for the final exec, and start another round of indexed load
V-V(exec)
younger instr can retire before older instr, i haven't come up with a good example...
V-S
can schedule non-dependent scalar code in a large convoy of vector instructions, e.g. vld, add, vadd, sub, vmul, mul ...
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