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Link Rocket and T1 for RocketT1Tile #684
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sequencer
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Jul 24, 2024
- [rtl] migrate T1 to FixedIOModule
- [nix] use chisel#sequencer/t1 to workaround bug
- [nix] bump upickle
- [build system] add rocketv build target
- [build system] implement the generic Elaborator trait
- [build system] add rocketv to elaborator
- [rocketv] copy ALU into rocketv project
- [rocketv] migrate ALU
- [rocketv] add elaborator for ALU
- [rocketv] copy AMOALU into rocketv project
- [rocketv] migrate AMOALU
- [rocketv] add elaborator for AMOALU
- [rocketv] copy Breakpoint into rocketv project
- [rocketv] migrate BreakpointUnit
- [rocketv] add elaborator for BreakpointUnit
- [rocketv] copy BTB into rocketv project
- [rocketv] migrate PopCountAtLeast
- [rocketv] copy ReplacementPolicy into rocketv project
- [rocketv] migrate Replacement
- [rocketv] migrate BTB
- [rocketv] add elaborator for BTB
- [rocketv] copy CSR into rocketv project
- [nix] bump rvdecoderdb for Causes fix
- [rocketv] migrate CSR
- [rocketv] add elaborator for CSR
- [rocketv] migrate Decoder
- [rocketv] add elaborator for Decoder
- [rocketv] copy RVCExpander into rocketv project
- [rocketv] migrate RVCExpander
- [rocketv] add elaborator for RVCExpander
- [rocketv] copy IBuf into rocketv project
- [rocketv] migrate IBuf
- [rocketv] add elaborator for IBuf
- [rocketv] copy Multipler into rocketv project
- [rocketv] migrate MulDiv and PipelinedMultiplier
- [rocketv] add elaborator for MulDiv and PipelinedMultiplier
- [rocketv] copy PMA into rocketv project
- [rocketv] migrate PMAChecker
- [rocketv] add elaborator for PMAChecker
- [rocketv] copy PMP into rocketv project
- [rocketv] migrate PMPChecker
- [rocketv] add elaborator for PMAChecker
- [rocketv] copy PTW into rocketv project
- [rocketv] copy ECC into rocketv project
- [rocketv] migrate PTW
- [rocketv] add elaborator for PTW
- [rocketv] copy ICache into rocketv project
- [rocketv] migrate ICache
- [rocketv] add elaborator for ICache
- [rocketv] copy FPU into rocketv project
- [rocketv] migrate FPU
- [rocketv] add elaborator for FPU
- [rocketv] copy TLB into rocketv project
- [rocketv] migrate TLB
- [rocketv] add elaborator for TLB
- [rocketv] copy DCache into rocketv project
- [rocketv] migrate DCache
- [rocketv] add elaborator for DCache
- [rocketv] copy Frontend into rocketv project
- [rocketv] migrate Frontend
- [rocketv] add elaborator for Frontend
- [rocketv] copy RocketCore into rocketv project
- [rocketv] migrate Rocket
- [rocketv] add elaborator for Rocket
- [rocketv] copy RocketTile into rocketv project
- [rocketv] implementing RocketTile
- [rocketv] add elaborator for RocketTile
- [nix]: add rocketv derivation
- [nix] add rocketv-mlirbc
- [nix] add rocketv-rtl target
- [nix] add new derivation rocketv-verilated-csrc
- [rocketemu] implement TestBench for RocketV Emulator
- [nix] add rocketv into elaborator source
- [nix] use elaborator for Rocket generate
- [dpi] expose AXI4 agent as C-API
- [nix] add scope for rocketemu attribute
- [rocketemu] implemented rocket driver
- [rocketemu] update TestBench implementation
- [rocketemu] update DPI C binding
- [nix] add riscv-tests into overlay
- [doc] add document about rocket emulator
- [rocketemu] migrate AXI from master
- [rocketemu] implement waveform generate
- [rocketemu] add missing watchdog call
- [rocketemu] Requires a longer reset.
- [rocketemu] fix wrong size
- [rocketemu] refactor AXI read functions and remove the read alignment
- [rocketv] fix DCache axi read.
- [build system] add t1-rocketv in build system for link t1 with rocket
- [rockett1] draft Tile
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Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
Only add for blastoise cuz the pytorch.demo tests required zve32f.
[rocketemu] catch watchdog timeout event in offline difftest [rocketemu] optimize difftest loop [rocketemu] should not soft link the nix result directly [rocketemu] spike event record reg write idx with hex [rocketemu] add support for msu priviledge [rocketemu] skip check when spike/rtl reg write idx == 0
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
- generate parameter json: mill elaborator.runMain org.chipsalliance.t1.elaborator.t1rocketv.T1RocketTile config --instructionSets rv32_i --instructionSets rv_a --instructionSets rv_v --instructionSets Zve32x --instructionSets zvl1024b --cacheBlockBytes 32 --nPMPs 8 --cacheable 80000000-ffffffff --sideEffects 00000000-1fffffff --dcacheNSets 64 --dcacheNWays 4 --dcacheRowBits 32 --iCacheNSets 32 --iCacheNWays 4 --iCachePrefetch false --dLen 256 --vrfBankSize 2 --vrfRamType p0rp1w - generate verilog: mill elaborator.runMain org.chipsalliance.t1.elaborator.t1rocketv.T1RocketTile design --parameter ./T1RocketTile.json --run-firtool
nix develop ".#t1.elaborator.editable" -c mill -i elaborator.runMain org.chipsalliance.t1.elaborator.t1rocketv.T1RocketTile config --instructionSets rv32_i --instructionSets rv_a --instructionSets rv_v --instructionSets Zve32x --instructionSets zvl1024b --cacheBlockBytes 32 --nPMPs 8 --cacheable 80000000-ffffffff --sideEffects 00000000-1fffffff --dcacheNSets 64 --dcacheNWays 4 --dcacheRowBits 32 --iCacheNSets 32 --iCacheNWays 4 --iCachePrefetch false --dLen 256 --vrfBankSize 2 --vrfRamType p0rp1w --instructionSets rv_c
[t1rocket] update t1rocketemu TestBench.scala to build the config json
[t1rocket] refactor load_from_payload function to improve readability and performance [t1rocket] add elf crate dependency
[t1rocket] add timeout check [t1rocket] use t1rocket_cosim_init instead of cosim_init to expose link bug
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
[t1rocket] fix wrong get_resetvector [t1rocket] fix unsafe extern "C" function signatures in dpi.rs [t1rocket] update axi_read_load_store function to use correct size parameter [t1rocket] add probes [t1rocket] add last commit cycle during axi to control timeout [t1rocket] add vrf score board check [t1rocket] refactor event's name in offline difftest
Signed-off-by: Avimitin <[email protected]>
Signed-off-by: Avimitin <[email protected]>
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