[rtl] fix pop count.

chipsalliance · Nov 15, 2024 · 04e896a · 04e896a
1 parent ec1f32e
commit 04e896a
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/t1/src/mask/MaskReduce.scala b/t1/src/mask/MaskReduce.scala
@@ -174,7 +174,7 @@ class MaskReduce(parameter: T1Parameter) extends Module {
   adder.request.src    := VecInit(Seq(reduceInit, source2Select))
   adder.request.opcode := Mux(pop, 0.U, reqReg.aluUop)
   adder.request.sign   := reqReg.sign
-  adder.request.vSew   := writeEEW
+  adder.request.vSew   := Mux(pop, 2.U, writeEEW)
 
   floatAdder.foreach { fAdder =>
     fAdder.io.a            := reduceInit