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Issues: BU-Tools/uHAL_AXI_regmap
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Issue with VHDL code generated using memory template (templates/axi_generic/template_map_withbram.vhd)
#31
opened Mar 23, 2023 by
prisundind
feature request: Address table packer
enhancement
New feature or request
#22
opened Mar 30, 2022 by
dgastler
Simple parser will quietly skip registers without permission tag
#20
opened Mar 29, 2022 by
dgastler
ProTip!
Updated in the last three days: updated:>2024-12-12.