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Usage of Light HLS

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Tingyuan LIANG edited this page Jul 19, 2021 · 15 revisions

Direct Usage Example

  When built, most test executables can be used like below but please check the source code for confirmation.
  (1) ./Light_HLS_Top  <C/C++ FILE> <top_function_name>  <configuration_file> [DEBUG]
  or
  (2) ./LLVM_expXXXXX  <C/C++ FILE> <top_function_name>  <configuration_file> [DEBUG]
  or
  (3) ./LLVM_expXXXXX  <C/C++ FILE> <top_function_name>   
  or
  (4) ./LLVM_expXXXXX  <C/C++ FILE>

Please note that if you want to get detailed information on scheduling, binding and optimization, you can set the optional "DEBUG" flag in the arguments of the command but the runtime could be longer.

Advanced Usage for General Evaluation of a Design:

  1. download the repository (entire project)

  2. the organization of this repository is: (1) basic functions and passes are implemented in the directory "Implementations". Nearly all the directories have their own README file to explain the directory. (2) experiments are tested in the directory "Test". (3) by making a "build" directory and using CMake in each experiment directory (e.g. this one), executable can be generated and tried. (hint: cmake .. & make) (4) for user's convenience, we prepare some scripts for example, BuildAllFiles.sh, which will build all the projects, CleanBuiltFiles.sh, which will clean all the built files to shrink the size of the directories, and Build.sh in test directory, which will just build one test project. All these scripts can be run directly.

  3. looking into the source codes which we have provided detailed comments, reader can trace the headers and functions to understand how the experiment work. Moreover, the README file in each directory will give you an overall understanding what the code is implemented for. Detailed information of Light-HLS implementation is provided here.

  4. in the directory HLS_Data_Lib, there is the library of the IR instructions on FPGA. Currently, the library is built for Zedboard (Xilinx Platform ID: xc7z020clg484-1). If you want to use Light-HLS for another platform, you can regenerate the library by using the LibGen.py, which will collect the information from VivadoHLS and designers can overwrite the library in HLS_Data_Lib with the new one. The LibGen.py supports multiple processes to accelerate the procedure. An example is shown below.

      python LibGen.py -n 12 -p xc7z020clg484-1

  5. Light-HLS supports HLS directives for the design, including loop unrolling, loop pipelining, array partitioning, static array setting, dataflow and clock settings, which can be set in a configuration file. Examples are shown in config_2mm.txt and config_conv.txt. If you want to check the loops' labels, please run Light-HLS without any loop configurations first and the source code with labels for loop, "tmp_loopLabeled.cc", will be generated in the directory. If you need to set array partition for the arrays, PLEASE note that in Light-HLS, the definition of the order of dimension is shown like [...][second dimension][first dimension].

  6. As you can notice in the usage examples, Light-HLS can run with DEBUG flag and lots of information during the HLS procedure will be dumped for analysis.

Advanced Usage for Design Optimization:

In Light-HLS, many useful hints or information are provided in runtime public variables or dumped log files for further optimization. Therefore, you can explore the generated LOG files and you might find something useful for you!!!

  1. For design configuration optimization, Light-HLS provides users with the information of loops and arrays. For examples: (1) Light-HLS can detect those targets, e.g. loops and arrays, which can be set HLS directives. (2) Light-HLS will indicate whether an array partitioning is useful to improve performance.(3) Light-HLS can evaluate the parallelism relationship between arrays and loops, which helps designer to proper partition arrays or unroll loops, e.g. some arrays should be partitioned when a specific loop is unrolled.

  2. For timing optimization, Light-HLS records the information of scheduling. Following are the examples: (1) The basic scheduling information, such as the timing of loops/functions/basic blocks and the scheduling of each instruction, which are illustrated here. (2) The log file presenting the iterative search procedure for different pipeline initiation intervals with the information of conflicts of BRAM access and the dependencies among different accesses.

  3. For resource optimization, more than indicating the resource cost of each instruction, Light-HLS provide the information of instruction chaining and reusing.

An example of Light-HLS for general HLS design space exploration for optimal HLS directive settings is implemented here. With initial parameters and constraints given in configuration file (example), the DSE flow will heuristically search for the optimal HLS directive setting for the application.

Another example is Hi-ClockFlow, a tool which searches for the configuration of clock settings and HLS directives for the multi-clock dataflow. With initial parameters and constraints given in configuration file (example), the DSE flow will heuristically search for the optimal HLS directive setting and the clock settings for the modules in the application.

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