[move support] add move support for v2hi in rv64p

gcc/config/riscv/rvp.md

@@ -21,6 +21,9 @@
 (define_mode_iterator VECI [(V4QI "!TARGET_64BIT") (V2HI "!TARGET_64BIT")
  (V8QI "TARGET_64BIT") (V4HI "TARGET_64BIT")
  (V2SI "TARGET_64BIT")])
+;; v2hi is also used in rv64p
+(define_mode_iterator VPMOVE [(V4QI "!TARGET_64BIT") (V2HI "")
+ (V8QI "TARGET_64BIT") (V4HI "TARGET_64BIT")])
 (define_mode_iterator VQIHI [(V4QI "!TARGET_64BIT") (V2HI "!TARGET_64BIT")
  (V8QI "TARGET_64BIT") (V4HI "TARGET_64BIT")])
 (define_mode_iterator VSHI [(V2HI "!TARGET_64BIT") (V2SI "TARGET_64BIT")])
@@ -7092,17 +7095,17 @@
 
 ;; move pattern
 (define_expand "mov<mode>"
- [(set (match_operand:VQIHI 0 "")
- (match_operand:VQIHI 1 ""))]
+ [(set (match_operand:VPMOVE 0 "")
+ (match_operand:VPMOVE 1 ""))]
  "TARGET_ZPN"
 {
  if (riscv_legitimize_move (<MODE>mode, operands[0], operands[1]))
  DONE;
 })
 
 (define_insn "*mov<mode>_internal"
- [(set (match_operand:VQIHI 0 "nonimmediate_operand" "=r,r,r, m, *f,*f,*r,*m")
- (match_operand:VQIHI 1 "move_operand" " r,T,m,rJ,*r*J,*m,*f,*f"))]
+ [(set (match_operand:VPMOVE 0 "nonimmediate_operand" "=r,r,r, m, *f,*f,*r,*m")
+ (match_operand:VPMOVE 1 "move_operand" " r,T,m,rJ,*r*J,*m,*f,*f"))]
  "(register_operand (operands[0], <MODE>mode)
  || reg_or_0_operand (operands[1], <MODE>mode))
  && TARGET_ZPN "