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Pull requests: riscv/riscv-isa-manual
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[CFI-zicfiss] updating pseudocode in ssamoswap unpriv
#1729
opened Nov 15, 2024 by
kacouane
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Fix list of vector crypto extensions that require SEW=64
#1697
opened Oct 25, 2024 by
ebiggers
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[vector crypto] Clarifying mandate for vector register index alignment to LMUL/EMUL
#1653
opened Sep 26, 2024 by
nibrunieAtSi5
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Makefile changes to include Highlighter Sail
#1608
opened Aug 22, 2024 by
AlfredoRodrigues4
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Specify the interaction between CSRRS/C and "reads as" bits
#1581
opened Aug 6, 2024 by
Timmmm
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Clarify that misaligned atomicity granule PMA applies to the compress…
#1557
opened Jul 24, 2024 by
romanheros
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Define format of memory-mapped msip register
Privileged Architecture v1.14
#1541
opened Jul 17, 2024 by
aswaterman
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[AdditionalVectorCrypto] adding section on addition vector crypto extensions
#1306
opened Mar 28, 2024 by
nibrunieAtSi5
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