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Update Darjeeling #59
Update Darjeeling #59
Commits on Apr 8, 2024
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[ot] hw/opentitan: ot_mbx: add a dedicated address space for RAM
HW implementation restricts MBOX memory to the MBOX SRAM. All other locations on the cross bar cannot be reached from the MBOX controller. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: ot_darjeeling.c: configure MBOX to use reserved MBOX SRAM
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/misc: pulp_rv_dm.c: shorten Pulp DM memory region names
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_dev_proxy.c: rework device enumeration
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] jtag: jtag_bitbang.c: add an option to manage remote VM termination
`quit=[on|off]` can be used with `-jtag` option to enable or disable VM termination on JTAG request. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: dm.c: command errors should not be propagated as DMI e…
…rror Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: dm.c: add DM name to all trace messages
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: dm.c: disable left-over debug trace
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: dm.c: simplify trace message masking
Also improve AARSIZE error reporting. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: dm.c: register on DTM on realization, not on reset.
This enables DM discovery even if the parent subsystem has not been reset. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: dm.c: code cleanup, add a new trace
Enable abstractauto by default. Beware that current version of OpenOCD (2024/04) assumes this feature is always supported. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot]: hw/riscv: OpenTitan RISC-V DM support abstractauto feature.
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] docs/opentitan: add initial documentation for JTAG Debug Module
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] scripts/opentitan: OpenOCD: update darjeeling config file
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: add a new API for IbexIRQ initialization.
Factorize a bit existing code. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_pinmux: add IbexIRQs to manage pad config
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_pinmux: rework to support pinmux variants
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_gpio: implement I/O as IbexIRQs
Add initial support for Pinmux Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_gpio: rework to support gpio variants
This also reverts commit 266a493 for the Earlgrey version. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: remove useless header file inclusions
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_gpio_dj: add HW strap support
+ fix issues from 266a493 Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_pwrmgr: add HW strap sampling
+ fix invalid state ordering in fast FSM Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: ot_darjeeling: connect HW strap signal from PwrMgr to …
…GPIO Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: ot_gpio: add support for PinMux and GPIO output
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] scripts/opentitan: update Treillis script with new GPIO features.
- Hi-Z support - Pull up/down settings - Remote-triggered wipe Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] scripts/opentitan: add new gpiodev.py script to exercise GPIO
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/block: m25p80.c: implement Resettable API for SPI flash devices.
Resettable API enables holding SPI flash device in reset if a reset pin is asserted. When the SPI flash device is held in reset, it should ignore SPI transfer and /CS signal. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/block: m25p80.c: add a "RESET#" input GPIO to manage HW reset
When the SPI flash device is held in reset, it ignores SPI transfers and /CS signal. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: dtm: add a sanity check for registering DMs
DM registration can only be done once DTM has been realized. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: dm: register on DTM while resetting
This enables realizing DTM and DM in any order. It is ok to register the same DM more than once, this action is simply ignored. Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/riscv: ot_darjeeling: fix DMI base address of RV DM
Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] hw/opentitan: jtag_bitbang: use info_report rather than qemu_log
... to report termination information Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] scripts/opentitan: pyot.py: fix invalid execution time with ext.…
… commands Signed-off-by: Emmanuel Blot <[email protected]>
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[ot] scripts/opentitan: pyot.py: improve & factorize log message reports
Signed-off-by: Emmanuel Blot <[email protected]>
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