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Pull requests list

[rtl] Flush pipe on all CSR modifications
#2214 opened Sep 17, 2024 by GregAC Loading…
Bump jinja2 from 3.0.3 to 3.1.3 in /doc dependencies Pull requests that update a dependency file
#2126 opened Jan 11, 2024 by dependabot bot Loading…
Remove srecord and use objcopy instead
#2062 opened Jul 18, 2023 by ctopal-rl Loading…
Add support for ZiCond(Conditional move)
#2046 opened Jun 12, 2023 by asimahsan1990 Loading…
[rtl] Add support for direct mode in mtvec
#2044 opened May 31, 2023 by leesum1 Loading…
Fix Verilator 5.010 compilation error
#2042 opened May 30, 2023 by leesum1 Loading…
run directed tests along with random when given TEST=all
#1983 opened Feb 9, 2023 by Saad525 Loading…
Update Complaince Testing framework for ibex
#1945 opened Nov 16, 2022 by Abdulwadoodd Loading…
CVE-2007-4559 Patch
#1900 opened Nov 3, 2022 by TrellixVulnTeam Loading…
Create container for DV environment
#1885 opened Oct 31, 2022 by andreaskurth Draft
3 tasks
[docs] Clean up line breaks #1191
#1858 opened Oct 16, 2022 by kal-ne Loading…
[rtl] Trim rf_reg addresses for RV32E
#1829 opened Oct 3, 2022 by ANurmi Loading…
[dv] Integrity error generation in memory busses Component:DV Design verification (DV) or testing issue Type:Enhancement Feature requests, enhancements
#1811 opened Sep 20, 2022 by ctopal Loading…
[ci] Add Yosys synthesis flow
#1501 opened Jan 4, 2022 by rkapuscik Draft
Add support for RISCOF based checks
#1251 opened Jan 25, 2021 by towoe Loading…
add RISC-V debug module to FPGA example
#1218 opened Dec 29, 2020 by majbthrd Loading…
Linter action with LibreCores CI
#960 opened Jun 16, 2020 by wallento Loading…
The ibex tracer rewritten to be synthesizable
#806 opened Apr 22, 2020 by jacekmw8 Loading…
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