lnis-uofu · yashton · Jul 26, 2021 · Jul 27, 2021 · Jul 27, 2021 · Jul 27, 2021
diff --git a/.cdsinit b/.cdsinit
@@ -0,0 +1,60 @@
+; TIGFET10nm Open Source Predictive Process Design Kit
+; Copyright (c) [2019] [Laboratory for NanoIntegrated Systems]
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are
+; met:
+;
+; 1. Redistributions of source code must retain the above copyright
+; notice, this list of conditions and the following disclaimer.
+;
+; 2. Redistributions in binary form must reproduce the above copyright
+; notice, this list of conditions and the following disclaimer in the
+; documentation and/or other materials provided with the distribution.
+;
+; 3. Neither the name of the copyright holder nor the names of its
+; contributors may be used to endorse or promote products derived from
+; this software without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+; HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+; Customizations can be made at the end of this file
+
+; Load display.drf
+envSetVal( "graphic" "drfPath" 'string strcat( getShellEnvVar("PDK_DIR") "/cdslib/setup/display.drf"))
+
+; Load Bind Keys
+loadi( strcat( getShellEnvVar("PDK_DIR") "/cdslib/setup/common_bindkeys.il"))
+
+; Setup Calibre
+if( getShellEnvVar("MGC_HOME") then
+  loadi( strcat( getShellEnvVar("MGC_HOME") "/shared/pkgs/icv/tools/queryskl/calibre.OA.skl"))
+) ;if
+
+; Load SKILL code in skill directory
+loadi( strcat( getShellEnvVar("PDK_DIR") "/cdslib/skill/loadSkill.il"))
+
+; Load default .cdsenv file
+(envLoadVals ?envFile  strcat( getShellEnvVar("PDK_DIR") "/cdslib/setup/cdsenv") ?tool "layout")
+
+printf( strcat(
+"---------------------------------------------------------------------------\n"
+"Welcome to the TIGFET10nm Free, Open-Source Process Design Kit\n"
+"\n"
+"---------------------------------------------------------------------------\n"
+"\n"
+"Done loading TIGFET10nm_PDK customizations.\n"
+))
+
+; Comment the line below to disable auto opening of the Library Manager
+ddsOpenLibManager()
diff --git a/.gitignore b/.gitignore
@@ -1,3 +1,12 @@
 .vscode
 dump
 cdlForForum
+*.log
+*.log.*
+*.cdslck
+*.cdslck.*
+*.txt
+*.jpg
+.cadence/
+*.oa-
+*.bak
diff --git a/Logic/.oalib b/Logic/.oalib
@@ -0,0 +1,6 @@
+<?xml version="1.0"?>
+
+<Library DMSystem="oaDMFileSys">
+    <oaDMFileSys libReadOnly="No"
+                 origFileSystem="Unix"/>
+</Library>
diff --git a/Logic/cdsinfo.tag b/Logic/cdsinfo.tag
@@ -0,0 +1,41 @@
+#
+# This is a cdsinfo.tag file.
+#
+# See the "Cadence Application Infrastructure Reference Manual" for
+# details on the format of this file, its semantics, and its use.
+#
+# The `#' character denotes a comment. Removing the leading `#'
+# character from any of the entries below will activate them.
+#
+# CDSLIBRARY entry - add this entry if the directory containing
+# this cdsinfo.tag file is the root of a Cadence library.
+# CDSLIBRARY
+#
+# CDSLIBCHECK - set this entry to require that libraries have
+# a cdsinfo.tag file with a CDSLIBRARY entry. Legal values are
+# ON and OFF. By default (OFF), directories named in a cds.lib file
+# do not have to have a cdsinfo.tag file with a CDSLIBRARY entry.
+# CDSLIBCHECK ON
+#
+# DMTYPE - set this entry to define the DM system for Cadence's
+# Generic DM facility. Values will be shifted to lower case.
+# DMTYPE none
+# DMTYPE crcs
+# DMTYPE tdm
+# DMTYPE sync
+#
+# NAMESPACE - set this entry to define the library namespace according
+# to the type of machine on which the data is stored. Legal values are
+# `LibraryNT' and
+# `LibraryUnix'.
+# NAMESPACE LibraryUnix
+#
+# Other entries may be added for use by specific applications as
+# name-value pairs. Application documentation will describe the
+# use and behaviour of these entries when appropriate.
+#
+# Current Settings:
+#
+CDSLIBRARY
+DMTYPE none
+NAMESPACE LibraryUnix
diff --git a/Logic/data.dm b/Logic/data.dm
diff --git a/Logic/hiz_inverter/schematic/data.dm b/Logic/hiz_inverter/schematic/data.dm
diff --git a/Logic/hiz_inverter/schematic/master.tag b/Logic/hiz_inverter/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/hiz_inverter/schematic/sch.oa b/Logic/hiz_inverter/schematic/sch.oa
diff --git a/Logic/hiz_inverter/schematic/thumbnail_128x128.png b/Logic/hiz_inverter/schematic/thumbnail_128x128.png
diff --git a/Logic/hiz_inverter/symbol/master.tag b/Logic/hiz_inverter/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/hiz_inverter/symbol/symbol.oa b/Logic/hiz_inverter/symbol/symbol.oa
diff --git a/Logic/hiz_inverter/symbol/thumbnail_128x128.png b/Logic/hiz_inverter/symbol/thumbnail_128x128.png
diff --git a/Logic/hiz_inverter_neg/layout/layout.oa b/Logic/hiz_inverter_neg/layout/layout.oa
diff --git a/Logic/hiz_inverter_neg/layout/master.tag b/Logic/hiz_inverter_neg/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/hiz_inverter_neg/layout/thumbnail_128x128.png b/Logic/hiz_inverter_neg/layout/thumbnail_128x128.png
diff --git a/Logic/hiz_inverter_neg/schematic/data.dm b/Logic/hiz_inverter_neg/schematic/data.dm
diff --git a/Logic/hiz_inverter_neg/schematic/master.tag b/Logic/hiz_inverter_neg/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/hiz_inverter_neg/schematic/sch.oa b/Logic/hiz_inverter_neg/schematic/sch.oa
diff --git a/Logic/hiz_inverter_neg/schematic/thumbnail_128x128.png b/Logic/hiz_inverter_neg/schematic/thumbnail_128x128.png
diff --git a/Logic/hiz_inverter_neg/symbol/master.tag b/Logic/hiz_inverter_neg/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/hiz_inverter_neg/symbol/symbol.oa b/Logic/hiz_inverter_neg/symbol/symbol.oa
diff --git a/Logic/hiz_inverter_neg/symbol/thumbnail_128x128.png b/Logic/hiz_inverter_neg/symbol/thumbnail_128x128.png
diff --git a/Logic/inverter/data.dm b/Logic/inverter/data.dm
diff --git a/Logic/inverter/schematic/data.dm b/Logic/inverter/schematic/data.dm
diff --git a/Logic/inverter/schematic/master.tag b/Logic/inverter/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/inverter/schematic/sch.oa b/Logic/inverter/schematic/sch.oa
diff --git a/Logic/inverter/schematic/thumbnail_128x128.png b/Logic/inverter/schematic/thumbnail_128x128.png
diff --git a/Logic/inverter/symbol/master.tag b/Logic/inverter/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/inverter/symbol/symbol.oa b/Logic/inverter/symbol/symbol.oa
diff --git a/Logic/inverter/symbol/thumbnail_128x128.png b/Logic/inverter/symbol/thumbnail_128x128.png
diff --git a/Logic/inverter_low_leak/data.dm b/Logic/inverter_low_leak/data.dm
diff --git a/Logic/inverter_low_leak/layout/layout.oa b/Logic/inverter_low_leak/layout/layout.oa
diff --git a/Logic/inverter_low_leak/layout/master.tag b/Logic/inverter_low_leak/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/inverter_low_leak/layout/thumbnail_128x128.png b/Logic/inverter_low_leak/layout/thumbnail_128x128.png
diff --git a/Logic/inverter_low_leak/schematic/data.dm b/Logic/inverter_low_leak/schematic/data.dm
diff --git a/Logic/inverter_low_leak/schematic/master.tag b/Logic/inverter_low_leak/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/inverter_low_leak/schematic/sch.oa b/Logic/inverter_low_leak/schematic/sch.oa
diff --git a/Logic/inverter_low_leak/schematic/thumbnail_128x128.png b/Logic/inverter_low_leak/schematic/thumbnail_128x128.png
diff --git a/Logic/inverter_low_leak/symbol/master.tag b/Logic/inverter_low_leak/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/inverter_low_leak/symbol/symbol.oa b/Logic/inverter_low_leak/symbol/symbol.oa
diff --git a/Logic/inverter_low_leak/symbol/thumbnail_128x128.png b/Logic/inverter_low_leak/symbol/thumbnail_128x128.png
diff --git a/Logic/layout_quad_bare/layout/layout.oa b/Logic/layout_quad_bare/layout/layout.oa
diff --git a/Logic/layout_quad_bare/layout/master.tag b/Logic/layout_quad_bare/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/layout_quad_bare/layout/thumbnail_128x128.png b/Logic/layout_quad_bare/layout/thumbnail_128x128.png
diff --git a/Logic/maj3/data.dm b/Logic/maj3/data.dm
diff --git a/Logic/maj3/schematic/data.dm b/Logic/maj3/schematic/data.dm
diff --git a/Logic/maj3/schematic/master.tag b/Logic/maj3/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/maj3/schematic/sch.oa b/Logic/maj3/schematic/sch.oa
diff --git a/Logic/maj3/schematic/thumbnail_128x128.png b/Logic/maj3/schematic/thumbnail_128x128.png
diff --git a/Logic/maj3/symbol/master.tag b/Logic/maj3/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/maj3/symbol/symbol.oa b/Logic/maj3/symbol/symbol.oa
diff --git a/Logic/maj3/symbol/thumbnail_128x128.png b/Logic/maj3/symbol/thumbnail_128x128.png
diff --git a/Logic/maj3_low_leak/data.dm b/Logic/maj3_low_leak/data.dm
diff --git a/Logic/maj3_low_leak/schematic/data.dm b/Logic/maj3_low_leak/schematic/data.dm
diff --git a/Logic/maj3_low_leak/schematic/master.tag b/Logic/maj3_low_leak/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/maj3_low_leak/schematic/sch.oa b/Logic/maj3_low_leak/schematic/sch.oa
diff --git a/Logic/maj3_low_leak/schematic/thumbnail_128x128.png b/Logic/maj3_low_leak/schematic/thumbnail_128x128.png
diff --git a/Logic/maj3_low_leak/symbol/master.tag b/Logic/maj3_low_leak/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/maj3_low_leak/symbol/symbol.oa b/Logic/maj3_low_leak/symbol/symbol.oa
diff --git a/Logic/maj3_low_leak/symbol/thumbnail_128x128.png b/Logic/maj3_low_leak/symbol/thumbnail_128x128.png
diff --git a/Logic/min3/data.dm b/Logic/min3/data.dm
diff --git a/Logic/min3/schematic/data.dm b/Logic/min3/schematic/data.dm
diff --git a/Logic/min3/schematic/master.tag b/Logic/min3/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/min3/schematic/sch.oa b/Logic/min3/schematic/sch.oa
diff --git a/Logic/min3/schematic/thumbnail_128x128.png b/Logic/min3/schematic/thumbnail_128x128.png
diff --git a/Logic/min3/symbol/master.tag b/Logic/min3/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/min3/symbol/symbol.oa b/Logic/min3/symbol/symbol.oa
diff --git a/Logic/min3/symbol/thumbnail_128x128.png b/Logic/min3/symbol/thumbnail_128x128.png
diff --git a/Logic/mux2_1/data.dm b/Logic/mux2_1/data.dm
diff --git a/Logic/mux2_1/schematic/data.dm b/Logic/mux2_1/schematic/data.dm
diff --git a/Logic/mux2_1/schematic/master.tag b/Logic/mux2_1/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/mux2_1/schematic/sch.oa b/Logic/mux2_1/schematic/sch.oa
diff --git a/Logic/mux2_1/schematic/thumbnail_128x128.png b/Logic/mux2_1/schematic/thumbnail_128x128.png
diff --git a/Logic/mux2_1/symbol/master.tag b/Logic/mux2_1/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/mux2_1/symbol/symbol.oa b/Logic/mux2_1/symbol/symbol.oa
diff --git a/Logic/mux2_1/symbol/thumbnail_128x128.png b/Logic/mux2_1/symbol/thumbnail_128x128.png
diff --git a/Logic/nand/data.dm b/Logic/nand/data.dm
diff --git a/Logic/nand/layout/layout.oa b/Logic/nand/layout/layout.oa
diff --git a/Logic/nand/layout/master.tag b/Logic/nand/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/nand/layout/thumbnail_128x128.png b/Logic/nand/layout/thumbnail_128x128.png
diff --git a/Logic/nand/schematic/data.dm b/Logic/nand/schematic/data.dm
diff --git a/Logic/nand/schematic/master.tag b/Logic/nand/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/nand/schematic/sch.oa b/Logic/nand/schematic/sch.oa
diff --git a/Logic/nand/schematic/thumbnail_128x128.png b/Logic/nand/schematic/thumbnail_128x128.png
diff --git a/Logic/nand/symbol/master.tag b/Logic/nand/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/nand/symbol/symbol.oa b/Logic/nand/symbol/symbol.oa
diff --git a/Logic/nand/symbol/thumbnail_128x128.png b/Logic/nand/symbol/thumbnail_128x128.png
diff --git a/Logic/nand_low_leakage/data.dm b/Logic/nand_low_leakage/data.dm
diff --git a/Logic/nand_low_leakage/layout/layout.oa b/Logic/nand_low_leakage/layout/layout.oa
diff --git a/Logic/nand_low_leakage/layout/master.tag b/Logic/nand_low_leakage/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/nand_low_leakage/layout/thumbnail_128x128.png b/Logic/nand_low_leakage/layout/thumbnail_128x128.png
diff --git a/Logic/nand_low_leakage/schematic/data.dm b/Logic/nand_low_leakage/schematic/data.dm
diff --git a/Logic/nand_low_leakage/schematic/master.tag b/Logic/nand_low_leakage/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/nand_low_leakage/schematic/sch.oa b/Logic/nand_low_leakage/schematic/sch.oa
diff --git a/Logic/nand_low_leakage/schematic/thumbnail_128x128.png b/Logic/nand_low_leakage/schematic/thumbnail_128x128.png
diff --git a/Logic/nand_low_leakage/symbol/master.tag b/Logic/nand_low_leakage/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/nand_low_leakage/symbol/symbol.oa b/Logic/nand_low_leakage/symbol/symbol.oa
diff --git a/Logic/nand_low_leakage/symbol/thumbnail_128x128.png b/Logic/nand_low_leakage/symbol/thumbnail_128x128.png
diff --git a/Logic/nor/data.dm b/Logic/nor/data.dm
diff --git a/Logic/nor/schematic/data.dm b/Logic/nor/schematic/data.dm
diff --git a/Logic/nor/schematic/master.tag b/Logic/nor/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/nor/schematic/sch.oa b/Logic/nor/schematic/sch.oa
diff --git a/Logic/nor/schematic/thumbnail_128x128.png b/Logic/nor/schematic/thumbnail_128x128.png
diff --git a/Logic/nor/symbol/master.tag b/Logic/nor/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/nor/symbol/symbol.oa b/Logic/nor/symbol/symbol.oa
diff --git a/Logic/nor/symbol/thumbnail_128x128.png b/Logic/nor/symbol/thumbnail_128x128.png
diff --git a/Logic/nor_low_leakage/data.dm b/Logic/nor_low_leakage/data.dm
diff --git a/Logic/nor_low_leakage/schematic/data.dm b/Logic/nor_low_leakage/schematic/data.dm
diff --git a/Logic/nor_low_leakage/schematic/master.tag b/Logic/nor_low_leakage/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/nor_low_leakage/schematic/sch.oa b/Logic/nor_low_leakage/schematic/sch.oa
diff --git a/Logic/nor_low_leakage/schematic/thumbnail_128x128.png b/Logic/nor_low_leakage/schematic/thumbnail_128x128.png
diff --git a/Logic/nor_low_leakage/symbol/master.tag b/Logic/nor_low_leakage/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/nor_low_leakage/symbol/symbol.oa b/Logic/nor_low_leakage/symbol/symbol.oa
diff --git a/Logic/nor_low_leakage/symbol/thumbnail_128x128.png b/Logic/nor_low_leakage/symbol/thumbnail_128x128.png
diff --git a/Logic/tspc/data.dm b/Logic/tspc/data.dm
diff --git a/Logic/tspc/schematic/data.dm b/Logic/tspc/schematic/data.dm
diff --git a/Logic/tspc/schematic/master.tag b/Logic/tspc/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/tspc/schematic/sch.oa b/Logic/tspc/schematic/sch.oa
diff --git a/Logic/tspc/schematic/thumbnail_128x128.png b/Logic/tspc/schematic/thumbnail_128x128.png
diff --git a/Logic/tspc/symbol/master.tag b/Logic/tspc/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/tspc/symbol/symbol.oa b/Logic/tspc/symbol/symbol.oa
diff --git a/Logic/tspc/symbol/thumbnail_128x128.png b/Logic/tspc/symbol/thumbnail_128x128.png
diff --git a/Logic/two_to_four_one_cold/data.dm b/Logic/two_to_four_one_cold/data.dm
diff --git a/Logic/two_to_four_one_cold/schematic/data.dm b/Logic/two_to_four_one_cold/schematic/data.dm
diff --git a/Logic/two_to_four_one_cold/schematic/master.tag b/Logic/two_to_four_one_cold/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/two_to_four_one_cold/schematic/sch.oa b/Logic/two_to_four_one_cold/schematic/sch.oa
diff --git a/Logic/two_to_four_one_cold/schematic/thumbnail_128x128.png b/Logic/two_to_four_one_cold/schematic/thumbnail_128x128.png
diff --git a/Logic/two_to_four_one_cold/symbol/master.tag b/Logic/two_to_four_one_cold/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/two_to_four_one_cold/symbol/symbol.oa b/Logic/two_to_four_one_cold/symbol/symbol.oa
diff --git a/Logic/two_to_four_one_cold/symbol/thumbnail_128x128.png b/Logic/two_to_four_one_cold/symbol/thumbnail_128x128.png
diff --git a/Logic/two_to_four_one_cold_low_leakage/data.dm b/Logic/two_to_four_one_cold_low_leakage/data.dm
diff --git a/Logic/two_to_four_one_cold_low_leakage/schematic/data.dm b/Logic/two_to_four_one_cold_low_leakage/schematic/data.dm
diff --git a/Logic/two_to_four_one_cold_low_leakage/schematic/master.tag b/Logic/two_to_four_one_cold_low_leakage/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/two_to_four_one_cold_low_leakage/schematic/sch.oa b/Logic/two_to_four_one_cold_low_leakage/schematic/sch.oa
diff --git a/Logic/two_to_four_one_cold_low_leakage/schematic/thumbnail_128x128.png b/Logic/two_to_four_one_cold_low_leakage/schematic/thumbnail_128x128.png
diff --git a/Logic/two_to_four_one_cold_low_leakage/symbol/master.tag b/Logic/two_to_four_one_cold_low_leakage/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/two_to_four_one_cold_low_leakage/symbol/symbol.oa b/Logic/two_to_four_one_cold_low_leakage/symbol/symbol.oa
diff --git a/Logic/two_to_four_one_cold_low_leakage/symbol/thumbnail_128x128.png b/Logic/two_to_four_one_cold_low_leakage/symbol/thumbnail_128x128.png
diff --git a/Logic/two_to_four_one_hot/data.dm b/Logic/two_to_four_one_hot/data.dm
diff --git a/Logic/two_to_four_one_hot/schematic/data.dm b/Logic/two_to_four_one_hot/schematic/data.dm
diff --git a/Logic/two_to_four_one_hot/schematic/master.tag b/Logic/two_to_four_one_hot/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/two_to_four_one_hot/schematic/sch.oa b/Logic/two_to_four_one_hot/schematic/sch.oa
diff --git a/Logic/two_to_four_one_hot/schematic/thumbnail_128x128.png b/Logic/two_to_four_one_hot/schematic/thumbnail_128x128.png
diff --git a/Logic/two_to_four_one_hot/symbol/master.tag b/Logic/two_to_four_one_hot/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/two_to_four_one_hot/symbol/symbol.oa b/Logic/two_to_four_one_hot/symbol/symbol.oa
diff --git a/Logic/two_to_four_one_hot/symbol/thumbnail_128x128.png b/Logic/two_to_four_one_hot/symbol/thumbnail_128x128.png
diff --git a/Logic/xnor2/data.dm b/Logic/xnor2/data.dm
diff --git a/Logic/xnor2/schematic/data.dm b/Logic/xnor2/schematic/data.dm
diff --git a/Logic/xnor2/schematic/master.tag b/Logic/xnor2/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/xnor2/schematic/sch.oa b/Logic/xnor2/schematic/sch.oa
diff --git a/Logic/xnor2/schematic/thumbnail_128x128.png b/Logic/xnor2/schematic/thumbnail_128x128.png
diff --git a/Logic/xnor2/symbol/master.tag b/Logic/xnor2/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/xnor2/symbol/symbol.oa b/Logic/xnor2/symbol/symbol.oa
diff --git a/Logic/xnor2/symbol/thumbnail_128x128.png b/Logic/xnor2/symbol/thumbnail_128x128.png
diff --git a/Logic/xor2/data.dm b/Logic/xor2/data.dm
diff --git a/Logic/xor2/schematic/data.dm b/Logic/xor2/schematic/data.dm
diff --git a/Logic/xor2/schematic/master.tag b/Logic/xor2/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/xor2/schematic/sch.oa b/Logic/xor2/schematic/sch.oa
diff --git a/Logic/xor2/schematic/thumbnail_128x128.png b/Logic/xor2/schematic/thumbnail_128x128.png
diff --git a/Logic/xor2/symbol/master.tag b/Logic/xor2/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/xor2/symbol/symbol.oa b/Logic/xor2/symbol/symbol.oa
diff --git a/Logic/xor2/symbol/thumbnail_128x128.png b/Logic/xor2/symbol/thumbnail_128x128.png
diff --git a/Logic/xor2_alt_layout/layout/layout.oa b/Logic/xor2_alt_layout/layout/layout.oa
diff --git a/Logic/xor2_alt_layout/layout/master.tag b/Logic/xor2_alt_layout/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/xor2_alt_layout/layout/thumbnail_128x128.png b/Logic/xor2_alt_layout/layout/thumbnail_128x128.png
diff --git a/Logic/xor2_low_leakage/data.dm b/Logic/xor2_low_leakage/data.dm
diff --git a/Logic/xor2_low_leakage/layout/layout.oa b/Logic/xor2_low_leakage/layout/layout.oa
diff --git a/Logic/xor2_low_leakage/layout/master.tag b/Logic/xor2_low_leakage/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/Logic/xor2_low_leakage/layout/thumbnail_128x128.png b/Logic/xor2_low_leakage/layout/thumbnail_128x128.png
diff --git a/Logic/xor2_low_leakage/schematic/data.dm b/Logic/xor2_low_leakage/schematic/data.dm
diff --git a/Logic/xor2_low_leakage/schematic/master.tag b/Logic/xor2_low_leakage/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/xor2_low_leakage/schematic/sch.oa b/Logic/xor2_low_leakage/schematic/sch.oa
diff --git a/Logic/xor2_low_leakage/schematic/thumbnail_128x128.png b/Logic/xor2_low_leakage/schematic/thumbnail_128x128.png
diff --git a/Logic/xor2_low_leakage/symbol/master.tag b/Logic/xor2_low_leakage/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/xor2_low_leakage/symbol/symbol.oa b/Logic/xor2_low_leakage/symbol/symbol.oa
diff --git a/Logic/xor2_low_leakage/symbol/thumbnail_128x128.png b/Logic/xor2_low_leakage/symbol/thumbnail_128x128.png
diff --git a/Logic/xor3/schematic/data.dm b/Logic/xor3/schematic/data.dm
diff --git a/Logic/xor3/schematic/master.tag b/Logic/xor3/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/Logic/xor3/schematic/sch.oa b/Logic/xor3/schematic/sch.oa
diff --git a/Logic/xor3/schematic/thumbnail_128x128.png b/Logic/xor3/schematic/thumbnail_128x128.png
diff --git a/Logic/xor3/symbol/master.tag b/Logic/xor3/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/Logic/xor3/symbol/symbol.oa b/Logic/xor3/symbol/symbol.oa
diff --git a/Logic/xor3/symbol/thumbnail_128x128.png b/Logic/xor3/symbol/thumbnail_128x128.png
diff --git a/TIGFET10nm/INVX1_LL/data.dm b/TIGFET10nm/INVX1_LL/data.dm
diff --git a/TIGFET10nm/INVX1_LL/layout/data.dm b/TIGFET10nm/INVX1_LL/layout/data.dm
diff --git a/TIGFET10nm/INVX1_LL/layout/layout.oa b/TIGFET10nm/INVX1_LL/layout/layout.oa
diff --git a/TIGFET10nm/INVX1_LL/layout/master.tag b/TIGFET10nm/INVX1_LL/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/TIGFET10nm/INVX1_LL/layout/thumbnail_128x128.png b/TIGFET10nm/INVX1_LL/layout/thumbnail_128x128.png
diff --git a/TIGFET10nm/INVX1_LL/schematic/data.dm b/TIGFET10nm/INVX1_LL/schematic/data.dm
diff --git a/TIGFET10nm/INVX1_LL/schematic/master.tag b/TIGFET10nm/INVX1_LL/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/TIGFET10nm/INVX1_LL/schematic/sch.oa b/TIGFET10nm/INVX1_LL/schematic/sch.oa
diff --git a/TIGFET10nm/INVX1_LL/schematic/thumbnail_128x128.png b/TIGFET10nm/INVX1_LL/schematic/thumbnail_128x128.png
diff --git a/TIGFET10nm/INVX1_LL/symbol/master.tag b/TIGFET10nm/INVX1_LL/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/INVX1_LL/symbol/symbol.oa b/TIGFET10nm/INVX1_LL/symbol/symbol.oa
diff --git a/TIGFET10nm/INVX1_LL/symbol/thumbnail_128x128.png b/TIGFET10nm/INVX1_LL/symbol/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_3GT/layout/layout.oa b/TIGFET10nm/TIGFET_3GT/layout/layout.oa
diff --git a/TIGFET10nm/TIGFET_3GT/layout/thumbnail_128x128.png b/TIGFET10nm/TIGFET_3GT/layout/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/auCdl/master.tag b/TIGFET10nm/TIGFET_3GT_ALT/auCdl/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/auCdl/symbol.oa b/TIGFET10nm/TIGFET_3GT_ALT/auCdl/symbol.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/auCdl/thumbnail_128x128.png b/TIGFET10nm/TIGFET_3GT_ALT/auCdl/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/auLvs/master.tag b/TIGFET10nm/TIGFET_3GT_ALT/auLvs/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/auLvs/symbol.oa b/TIGFET10nm/TIGFET_3GT_ALT/auLvs/symbol.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/auLvs/thumbnail_128x128.png b/TIGFET10nm/TIGFET_3GT_ALT/auLvs/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/data.dm b/TIGFET10nm/TIGFET_3GT_ALT/data.dm
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/layout/layout.oa b/TIGFET10nm/TIGFET_3GT_ALT/layout/layout.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/layout/master.tag b/TIGFET10nm/TIGFET_3GT_ALT/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/layout/thumbnail_128x128.png b/TIGFET10nm/TIGFET_3GT_ALT/layout/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/symbol/master.tag b/TIGFET10nm/TIGFET_3GT_ALT/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/symbol/symbol.oa b/TIGFET10nm/TIGFET_3GT_ALT/symbol/symbol.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/symbol/thumbnail_128x128.png b/TIGFET10nm/TIGFET_3GT_ALT/symbol/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/veriloga/data.dm b/TIGFET10nm/TIGFET_3GT_ALT/veriloga/data.dm
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/veriloga/master.tag b/TIGFET10nm/TIGFET_3GT_ALT/veriloga/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+veriloga.va
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/veriloga/netlist.oa b/TIGFET10nm/TIGFET_3GT_ALT/veriloga/netlist.oa
diff --git a/TIGFET10nm/TIGFET_3GT_ALT/veriloga/veriloga.va b/TIGFET10nm/TIGFET_3GT_ALT/veriloga/veriloga.va
@@ -0,0 +1,14 @@
+// VerilogA for NCSU_TechLib_FreePDK15, TIGFET_3GT, veriloga
+
+`include "constants.vams"
+`include "disciplines.vams"
+
+module TIGFET_3GT_ALT(d,pgd,cg,pgs,s);
+    inout d,pgd,cg,pgs,s;
+    electrical d,pgd,cg,pgs,s;
+    parameter integer n = 4;
+
+    analog begin 
+            I(d,s)  <+ n * $table_model(V(pgd,s),V(pgs,s),V(cg,s),V(d,s), "Id_NW10n4G.tbl","1,1,1,1");
+    end
+endmodule
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/data.dm b/TIGFET10nm/TIGFET_GROUPED_2T/data.dm
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/layout/data.dm b/TIGFET10nm/TIGFET_GROUPED_2T/layout/data.dm
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/layout/layout.oa b/TIGFET10nm/TIGFET_GROUPED_2T/layout/layout.oa
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/layout/master.tag b/TIGFET10nm/TIGFET_GROUPED_2T/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/layout/thumbnail_128x128.png b/TIGFET10nm/TIGFET_GROUPED_2T/layout/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/schematic/data.dm b/TIGFET10nm/TIGFET_GROUPED_2T/schematic/data.dm
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/schematic/master.tag b/TIGFET10nm/TIGFET_GROUPED_2T/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/schematic/sch.oa b/TIGFET10nm/TIGFET_GROUPED_2T/schematic/sch.oa
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/schematic/thumbnail_128x128.png b/TIGFET10nm/TIGFET_GROUPED_2T/schematic/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/symbol/master.tag b/TIGFET10nm/TIGFET_GROUPED_2T/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/symbol/symbol.oa b/TIGFET10nm/TIGFET_GROUPED_2T/symbol/symbol.oa
diff --git a/TIGFET10nm/TIGFET_GROUPED_2T/symbol/thumbnail_128x128.png b/TIGFET10nm/TIGFET_GROUPED_2T/symbol/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/auCdl/master.tag b/TIGFET10nm/TIGFET_PCELL_SP15CP15/auCdl/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/auCdl/symbol.oa b/TIGFET10nm/TIGFET_PCELL_SP15CP15/auCdl/symbol.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/auCdl/thumbnail_128x128.png b/TIGFET10nm/TIGFET_PCELL_SP15CP15/auCdl/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/auLvs/master.tag b/TIGFET10nm/TIGFET_PCELL_SP15CP15/auLvs/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/auLvs/symbol.oa b/TIGFET10nm/TIGFET_PCELL_SP15CP15/auLvs/symbol.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/auLvs/thumbnail_128x128.png b/TIGFET10nm/TIGFET_PCELL_SP15CP15/auLvs/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/data.dm b/TIGFET10nm/TIGFET_PCELL_SP15CP15/data.dm
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/data.dm b/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/data.dm
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/master.tag b/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+spice.spc
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/netlist.oa b/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/netlist.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/spice.spc b/TIGFET10nm/TIGFET_PCELL_SP15CP15/hspiceD/spice.spc
@@ -0,0 +1,8 @@
+* "spice" description for "TIGFET10nm", "TIGFET_PCELL_SP15CP15", "hSpiceD" 
+
+
+simulator lang=spice
+
+.SUBCKT TIGFET_PCELL_SP15CP15 d pgd cg pgs s Cch_pg = 2.0763e-17 Cch_cg = 2.0763e-17 Cof_spg = 6.9637e-18 Cof_cgpg = 3.1661e-18 Cside_spgs = 5.3932e-18 Cside_scg = 3.4529e-18 Cside_spgd = 2.9376e-18 Cside_cgpg = 4.5154e-18 Cside_pgpg = 3.2916e-18 Cif_spgs = 3.4267e-18 Cif_scg = 1.4277e-18 Cif_spgd = 8.887e-19 
+
+.ENDS
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/data.dm b/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/data.dm
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/layout.oa b/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/layout.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/master.tag b/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+layout.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/thumbnail_128x128.png b/TIGFET10nm/TIGFET_PCELL_SP15CP15/layout/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/symbol/master.tag b/TIGFET10nm/TIGFET_PCELL_SP15CP15/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/symbol/symbol.oa b/TIGFET10nm/TIGFET_PCELL_SP15CP15/symbol/symbol.oa
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/symbol/thumbnail_128x128.png b/TIGFET10nm/TIGFET_PCELL_SP15CP15/symbol/thumbnail_128x128.png
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/veriloga/data.dm b/TIGFET10nm/TIGFET_PCELL_SP15CP15/veriloga/data.dm
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/veriloga/master.tag b/TIGFET10nm/TIGFET_PCELL_SP15CP15/veriloga/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+veriloga.va
diff --git a/TIGFET10nm/TIGFET_PCELL_SP15CP15/veriloga/netlist.oa b/TIGFET10nm/TIGFET_PCELL_SP15CP15/veriloga/netlist.oa