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soc/cores/cpu/coreblocks/core: update compile flags
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piotro888 committed Feb 8, 2024
1 parent 502c62d commit 844c2bd
Showing 1 changed file with 4 additions and 11 deletions.
15 changes: 4 additions & 11 deletions litex/soc/cores/cpu/coreblocks/core.py
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
#
# This file is part of LiteX.
#
# Copyright (c) 2023 Piotr Wegrzyn (Kuznia Rdzeni)
# Copyright (c) 2023-2024 Piotr Wegrzyn (Kuznia Rdzeni)
# SPDX-License-Identifier: BSD-2-Clause

import os
Expand All @@ -24,16 +24,9 @@
# GCC Flags ----------------------------------------------------------------------------------------

GCC_FLAGS = {
# /------------ Base ISA
# | /------- Hardware Multiply + Divide
# | |/----- Atomics
# | ||/---- Compressed ISA
# | |||/--- Single-Precision Floating-Point
# | ||||/-- Double-Precision Floating-Point
# i macfd
"minimal": "-march=rv32i2p0 -mabi=ilp32 ",
"standard": "-march=rv32i2p0 -mabi=ilp32 ",
"full": "-march=rv32i2p0_m -mabi=ilp32 -mno-div ",
"minimal": "-march=rv32e2p1 -mabi=ilp32 ",
"standard": "-march=rv32i2p1_zicsr -mabi=ilp32 ",
"full": "-march=rv32i2p1_mcbzicsr -mabi=ilp32 ",
}

# Coreblocks ----------------------------------------------------------------------------------------
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