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DummyLSU as a FU

DummyLSU as a FU #2552

Triggered via pull request March 29, 2024 14:53
Status Failure
Total duration 13m 35s
Artifacts 1

main.yml

on: pull_request
Synthesize full core
31s
Synthesize full core
Build regression tests (riscv-tests)
47s
Build regression tests (riscv-tests)
Build regression tests (riscv-arch-test)
44s
Build regression tests (riscv-arch-test)
Run unit tests
4m 34s
Run unit tests
Check code formatting and typing
32s
Check code formatting and typing
Run regression tests (riscv-tests)
4m 14s
Run regression tests (riscv-tests)
Run regression tests (riscv-arch-test)
12m 35s
Run regression tests (riscv-arch-test)
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2 errors
Check code formatting and typing
Process completed with exit code 1.
Run unit tests
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
verilog-full-core Expired
339 KB