Allow parallel compilation of the verilated model (#623) #2522
tilkmain.yml
on: push
Synthesize full core
36s
Build regression tests (riscv-tests)
55s
Build regression tests (riscv-arch-test)
54s
Run unit tests
6m 43s
Check code formatting and typing
49s
Run regression tests (riscv-tests)
4m 15s
Run regression tests (riscv-arch-test)
11m 56s
Artifacts
Produced during runtime
| Name | Size | |
|---|---|---|
|
verilog-full-core
Expired
|
323 KB |
|