LiteX support changes #3074
main.yml
on: pull_request
Synthesize full core
37s
Build regression tests (riscv-tests)
41s
Build regression tests (riscv-arch-test)
37s
Run unit tests
15m 15s
Check code formatting and typing
37s
Run regression tests (riscv-tests)
5m 33s
Run regression tests (riscv-arch-test)
14m 30s
Annotations
2 errors
Run unit tests
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Run unit tests
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Artifacts
Produced during runtime
Name | Size | |
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verilog-full-core
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540 KB |
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