Implement misa
CSR
#3040
main.yml
on: pull_request
Synthesize full core
33s
Build regression tests (riscv-tests)
37s
Build regression tests (riscv-arch-test)
36s
Run unit tests
7m 54s
Check code formatting and typing
36s
Run regression tests (riscv-tests)
5m 49s
Run regression tests (riscv-arch-test)
14m 45s
Artifacts
Produced during runtime
Name | Size | |
---|---|---|
verilog-full-core
|
539 KB |
|