Andd54/independent watchdog

boards/DJI_Board_TypeA/Core/Inc/iwdg.h

@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    iwdg.h
+  * @brief   This file contains all the function prototypes for
+  *          the iwdg.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __IWDG_H__
+#define __IWDG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern IWDG_HandleTypeDef hiwdg;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_IWDG_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IWDG_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

boards/DJI_Board_TypeA/Core/Inc/stm32f4xx_hal_conf.h

@@ -54,7 +54,7 @@
 /* #define HAL_HASH_MODULE_ENABLED   */
 #define HAL_I2C_MODULE_ENABLED
 /* #define HAL_I2S_MODULE_ENABLED   */
-/* #define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_IWDG_MODULE_ENABLED
 /* #define HAL_LTDC_MODULE_ENABLED   */
 /* #define HAL_RNG_MODULE_ENABLED   */
 /* #define HAL_RTC_MODULE_ENABLED   */

boards/DJI_Board_TypeA/Core/Src/iwdg.c

@@ -0,0 +1,47 @@
+/**
+  ******************************************************************************
+  * @file    iwdg.c
+  * @brief   This file provides code for the configuration
+  *          of the IWDG instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "iwdg.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+IWDG_HandleTypeDef hiwdg;
+
+/* IWDG init function */
+void MX_IWDG_Init(void)
+{
+
+  hiwdg.Instance = IWDG;
+  hiwdg.Init.Prescaler = IWDG_PRESCALER_32;
+  hiwdg.Init.Reload = 3000;
+  if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

boards/DJI_Board_TypeA/Core/Src/main.c

@@ -25,6 +25,7 @@
 #include "dma.h"
 #include "fatfs.h"
 #include "i2c.h"
+#include "iwdg.h"
 #include "sdio.h"
 #include "spi.h"
 #include "tim.h"
@@ -116,6 +117,7 @@ int main(void)
   MX_I2C2_Init();
   MX_FATFS_Init();
   MX_TIM2_Init();
+  MX_IWDG_Init();
   /* USER CODE BEGIN 2 */
 
   /* USER CODE END 2 */
@@ -154,8 +156,9 @@ void SystemClock_Config(void)
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
   RCC_OscInitStruct.PLL.PLLM = 6;
@@ -214,7 +217,10 @@ void Error_Handler(void)
 {
   /* USER CODE BEGIN Error_Handler_Debug */
   /* User can add his own implementation to report the HAL error return state */
-
+    while(1){
+//        HAL_GPIO_TogglePin(LED_R_GPIO_Port, LED_R_Pin);
+        HAL_Delay(100);
+    }
   /* USER CODE END Error_Handler_Debug */
 }
 

boards/DJI_Board_TypeA/DJI_Board_TypeA.ioc

@@ -27,10 +27,13 @@ ADC1.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_144CYCLES
 ADC1.SamplingTime-8\#ChannelRegularConversion=ADC_SAMPLETIME_144CYCLES
 ADC1.ScanConvMode=ENABLE
 ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
 CAN1.ABOM=ENABLE
 CAN1.BS1=CAN_BS1_9TQ
 CAN1.BS2=CAN_BS2_4TQ
-CAN1.CalculateBaudRate=1000000000/999.999999992
+CAN1.CalculateBaudRate=1000000000/1000.0
 CAN1.CalculateTimeBit=3*23.80952380952381*14
 CAN1.CalculateTimeQuantum=3*23.80952380952381
 CAN1.IPParameters=CalculateTimeQuantum,Prescaler,BS1,BS2,ABOM,NART,CalculateTimeBit,CalculateBaudRate,SJW
@@ -42,7 +45,7 @@ CAN2.ABOM=ENABLE
 CAN2.BS1=CAN_BS1_9TQ
 CAN2.BS2=CAN_BS2_4TQ
 CAN2.CalculateBaudRate=1000000
-CAN2.CalculateTimeBit=999.99
+CAN2.CalculateTimeBit=1000
 CAN2.CalculateTimeQuantum=71.42857142857143
 CAN2.IPParameters=CalculateTimeQuantum,Prescaler,BS1,BS2,ABOM,NART,CalculateTimeBit,CalculateBaudRate
 CAN2.NART=ENABLE
@@ -202,8 +205,6 @@ FATFS0.BSP.STBoard=false
 FATFS0.BSP.api=Unknown
 FATFS0.BSP.component=
 FATFS0.BSP.condition=
-FATFS0.BSP.i2caddr=0
-FATFS0.BSP.i2creg=
 FATFS0.BSP.instance=PE15
 FATFS0.BSP.ip=GPIO
 FATFS0.BSP.mode=Input
@@ -221,34 +222,39 @@ FREERTOS.configTOTAL_HEAP_SIZE=65536
 FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
+IWDG.IPParameters=Reload,Prescaler
+IWDG.Prescaler=IWDG_PRESCALER_32
+IWDG.Reload=3000
 KeepUserPlacement=false
+Mcu.CPN=STM32F427IIH6
 Mcu.Family=STM32F4
 Mcu.IP0=ADC1
 Mcu.IP1=CAN1
-Mcu.IP10=SPI1
-Mcu.IP11=SPI5
-Mcu.IP12=SYS
-Mcu.IP13=TIM1
-Mcu.IP14=TIM2
-Mcu.IP15=TIM4
-Mcu.IP16=TIM5
-Mcu.IP17=TIM12
-Mcu.IP18=UART7
-Mcu.IP19=UART8
+Mcu.IP10=SDIO
+Mcu.IP11=SPI1
+Mcu.IP12=SPI5
+Mcu.IP13=SYS
+Mcu.IP14=TIM1
+Mcu.IP15=TIM2
+Mcu.IP16=TIM4
+Mcu.IP17=TIM5
+Mcu.IP18=TIM12
+Mcu.IP19=UART7
 Mcu.IP2=CAN2
-Mcu.IP20=USART1
-Mcu.IP21=USART3
-Mcu.IP22=USART6
-Mcu.IP23=USB_DEVICE
-Mcu.IP24=USB_OTG_FS
+Mcu.IP20=UART8
+Mcu.IP21=USART1
+Mcu.IP22=USART3
+Mcu.IP23=USART6
+Mcu.IP24=USB_DEVICE
+Mcu.IP25=USB_OTG_FS
 Mcu.IP3=DMA
 Mcu.IP4=FATFS
 Mcu.IP5=FREERTOS
 Mcu.IP6=I2C2
-Mcu.IP7=NVIC
-Mcu.IP8=RCC
-Mcu.IP9=SDIO
-Mcu.IPNb=25
+Mcu.IP7=IWDG
+Mcu.IP8=NVIC
+Mcu.IP9=RCC
+Mcu.IPNb=26
 Mcu.Name=STM32F427I(G-I)Hx
 Mcu.Package=UFBGA176
 Mcu.Pin0=PE1
@@ -335,65 +341,66 @@ Mcu.Pin81=PE15
 Mcu.Pin82=PB10
 Mcu.Pin83=VP_FATFS_VS_SDIO
 Mcu.Pin84=VP_FREERTOS_VS_CMSIS_V2
-Mcu.Pin85=VP_SYS_VS_tim3
-Mcu.Pin86=VP_TIM1_VS_ClockSourceINT
-Mcu.Pin87=VP_TIM2_VS_ClockSourceINT
-Mcu.Pin88=VP_TIM4_VS_ClockSourceINT
-Mcu.Pin89=VP_TIM5_VS_ClockSourceINT
+Mcu.Pin85=VP_IWDG_VS_IWDG
+Mcu.Pin86=VP_SYS_VS_tim3
+Mcu.Pin87=VP_TIM1_VS_ClockSourceINT
+Mcu.Pin88=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin89=VP_TIM4_VS_ClockSourceINT
 Mcu.Pin9=PA13
-Mcu.Pin90=VP_TIM12_VS_ClockSourceINT
-Mcu.Pin91=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
-Mcu.PinsNb=92
+Mcu.Pin90=VP_TIM5_VS_ClockSourceINT
+Mcu.Pin91=VP_TIM12_VS_ClockSourceINT
+Mcu.Pin92=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
+Mcu.PinsNb=93
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F427IIHx
 MxCube.Version=6.1.1
 MxDb.Version=DB.6.0.10
-NVIC.ADC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.CAN1_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.CAN1_TX_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.CAN2_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.CAN2_TX_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.EXTI4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
+NVIC.ADC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.CAN1_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.CAN1_TX_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.CAN2_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.CAN2_TX_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.EXTI4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.OTG_FS_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.OTG_FS_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SDIO_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
+NVIC.SDIO_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
 NVIC.SavedPendsvIrqHandlerGenerated=true
 NVIC.SavedSvcallIrqHandlerGenerated=true
 NVIC.SavedSystickIrqHandlerGenerated=true
-NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true
-NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
-NVIC.TIM8_BRK_TIM12_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false
+NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true\:true
+NVIC.TIM8_BRK_TIM12_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
 NVIC.TimeBase=TIM3_IRQn
 NVIC.TimeBaseIP=TIM3
-NVIC.UART7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.UART8_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.USART6_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.UART7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.UART8_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.USART6_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 PA11.Mode=Device_Only
 PA11.Signal=USB_OTG_FS_DM
 PA12.Mode=Device_Only
@@ -657,12 +664,15 @@ ProjectManager.PreviousToolchain=SW4STM32
 ProjectManager.ProjectBuild=false
 ProjectManager.ProjectFileName=DJI_Board_TypeA.ioc
 ProjectManager.ProjectName=DJI_Board_TypeA
+ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=CAN,SPI,TIM,UART,USART
 ProjectManager.StackSize=0x800
 ProjectManager.TargetToolchain=Makefile
 ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-true,4-MX_SDIO_SD_Init-SDIO-false-HAL-true,5-MX_USART6_UART_Init-USART6-false-HAL-true,6-MX_TIM12_Init-TIM12-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,8-MX_ADC1_Init-ADC1-false-HAL-true,9-MX_SPI5_Init-SPI5-false-HAL-true,10-MX_CAN1_Init-CAN1-false-HAL-true,11-MX_CAN2_Init-CAN2-false-HAL-true,12-MX_USART3_UART_Init-USART3-false-HAL-true,13-MX_UART7_Init-UART7-false-HAL-true,14-MX_UART8_Init-UART8-false-HAL-true,15-MX_TIM4_Init-TIM4-false-HAL-true,16-MX_TIM5_Init-TIM5-false-HAL-true,17-MX_USART1_UART_Init-USART1-false-HAL-true,18-MX_TIM1_Init-TIM1-false-HAL-true,19-MX_I2C2_Init-I2C2-false-HAL-true,20-MX_FATFS_Init-FATFS-false-HAL-false,21-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,22-MX_TIM2_Init-TIM2-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-true,4-MX_SDIO_SD_Init-SDIO-false-HAL-true,5-MX_USART6_UART_Init-USART6-false-HAL-true,6-MX_TIM12_Init-TIM12-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,8-MX_ADC1_Init-ADC1-false-HAL-true,9-MX_SPI5_Init-SPI5-false-HAL-true,10-MX_CAN1_Init-CAN1-false-HAL-true,11-MX_CAN2_Init-CAN2-false-HAL-true,12-MX_USART3_UART_Init-USART3-false-HAL-true,13-MX_UART7_Init-UART7-false-HAL-true,14-MX_UART8_Init-UART8-false-HAL-true,15-MX_TIM4_Init-TIM4-false-HAL-true,16-MX_TIM5_Init-TIM5-false-HAL-true,17-MX_USART1_UART_Init-USART1-false-HAL-true,18-MX_TIM1_Init-TIM1-false-HAL-true,19-MX_I2C2_Init-I2C2-false-HAL-true,20-MX_FATFS_Init-FATFS-false-HAL-false,21-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,22-MX_TIM2_Init-TIM2-false-HAL-true,23-MX_IWDG_Init-IWDG-false-HAL-true
 RCC.48MHZClocksFreq_Value=48000000
 RCC.AHBFreq_Value=168000000
 RCC.APB1CLKDivider=RCC_HCLK_DIV4
@@ -805,6 +815,8 @@ VP_FATFS_VS_SDIO.Mode=SDIO
 VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO
 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
+VP_IWDG_VS_IWDG.Mode=IWDG_Activate
+VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
 VP_SYS_VS_tim3.Mode=TIM3
 VP_SYS_VS_tim3.Signal=SYS_VS_tim3
 VP_TIM12_VS_ClockSourceINT.Mode=Internal
@@ -820,3 +832,4 @@ VP_TIM5_VS_ClockSourceINT.Signal=TIM5_VS_ClockSourceINT
 VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
 VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS
 board=iRM_2018_Type_A
+rtos.0.ip=FREERTOS