Skip to content

Issues: fpga-open-speech-tools/simulink_codegen

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

7 Open 21 Closed
7 Open 21 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

Create python package enhancement New feature or request
#56 opened Jan 22, 2021 by tvannoy
Update populate_addtional_filesets to support Linux
#51 opened Dec 1, 2020 by fe-wickham
Avalon wrapper generator improvements enhancement New feature or request refactor Refactoring needed
#46 opened Aug 25, 2020 by tvannoy
Remove all Matlab generated VHDL files before generating new VHDL bug Something isn't working
#43 opened Aug 19, 2020 by fe-wickham
Make registers writeable by all users
#30 opened Jun 23, 2020 by tvannoy
2
Remove unused driver functions good first issue Good for newcomers question Further information is requested
#20 opened Mar 11, 2020 by tvannoy
@tvannoy @fe-tdavis @fe-wickham
Remove register offset define statements good first issue Good for newcomers
#5 opened Oct 6, 2019 by tvannoy
@tvannoy @fe-wickham
2
ProTip! Follow long discussions with comments:>50.