[om] add omreader and omreaderlib

build.sc

@@ -280,6 +280,42 @@ trait Elaborator
   def chiselIvy = None
 }
 
+object omreaderlib extends OMReaderLib
+
+trait OMReaderLib
+  extends millbuild.common.OMReaderLibModule {
+  def scalaVersion = T(v.scala)
+
+  def panamaconverterModule = panamaconverter
+
+  def circtInstallPath = T.input(PathRef(os.Path(T.ctx().env("CIRCT_INSTALL_PATH"))))
+
+  def mainargsIvy = v.mainargs
+
+  def chiselModule = Some(chisel)
+  def chiselPluginJar = T(Some(chisel.pluginModule.jar()))
+  def chiselPluginIvy = None
+  def chiselIvy = None
+}
+
+object omreader extends OMReader
+
+trait OMReader
+  extends millbuild.common.OMReaderModule {
+  def scalaVersion = T(v.scala)
+
+  def panamaconverterModule = panamaconverter
+  def omreaderlibModule = omreaderlib
+
+  def circtInstallPath = T.input(PathRef(os.Path(T.ctx().env("CIRCT_INSTALL_PATH"))))
+
+  def mainargsIvy = v.mainargs
+
+  def chiselModule = Some(chisel)
+  def chiselPluginJar = T(Some(chisel.pluginModule.jar()))
+  def chiselPluginIvy = None
+  def chiselIvy = None
+}
 
 /** A simple release flow for T1 generator:
   * package required dependency to flat jar.

common.sc

@@ -129,3 +129,32 @@ trait ElaboratorModule
     super.forkArgs() ++ Seq("--enable-native-access=ALL-UNNAMED", "--enable-preview", s"-Djava.library.path=${ circtInstallPath().path / "lib"}")
   )
 }
+
+trait OMReaderLibModule
+  extends ScalaModule
+    with HasChisel {
+  def panamaconverterModule: ScalaModule
+  def circtInstallPath: T[PathRef]
+  override def moduleDeps = super.moduleDeps ++ Seq(panamaconverterModule)
+  def mainargsIvy: Dep
+  override def ivyDeps = T(super.ivyDeps() ++ Seq(mainargsIvy))
+  override def javacOptions = T(super.javacOptions() ++ Seq("--enable-preview", "--release", "21"))
+  override def forkArgs: T[Seq[String]] = T(
+    super.forkArgs() ++ Seq("--enable-native-access=ALL-UNNAMED", "--enable-preview", s"-Djava.library.path=${ circtInstallPath().path / "lib"}")
+  )
+}
+
+trait OMReaderModule
+  extends ScalaModule
+    with HasChisel {
+  def panamaconverterModule: ScalaModule
+  def omreaderlibModule: ScalaModule
+  def circtInstallPath: T[PathRef]
+  override def moduleDeps = super.moduleDeps ++ Seq(panamaconverterModule, omreaderlibModule)
+  def mainargsIvy: Dep
+  override def ivyDeps = T(super.ivyDeps() ++ Seq(mainargsIvy))
+  override def javacOptions = T(super.javacOptions() ++ Seq("--enable-preview", "--release", "21"))
+  override def forkArgs: T[Seq[String]] = T(
+    super.forkArgs() ++ Seq("--enable-native-access=ALL-UNNAMED", "--enable-preview", s"-Djava.library.path=${ circtInstallPath().path / "lib"}")
+  )
+}

omreader/src/Main.scala

@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: Apache-2.0
+// SPDX-FileCopyrightText: 2022 Jiuyang Liu <[email protected]>
+
+package org.chipsalliance.t1.omreader
+
+import java.io.BufferedInputStream
+import mainargs._
+import chisel3.panamaom._
+import org.chipsalliance.t1.omreaderlib._
+
+object Main {
+  implicit object PathRead extends TokensReader.Simple[os.Path] {
+    def shortName = "path"
+    def read(strs: Seq[String]): Either[String, os.Path] = Right(os.Path(strs.head, os.pwd))
+  }
+
+  @main
+  def run(
+    @arg(name = "mlirbc-file") mlirbcFile: Option[os.Path],
+    @arg(name = "class-name") className: String,
+    @arg(name = "dump-methods") dumpMethods: Flag,
+    @arg(name = "eval") eval: Option[String],
+  ) = {
+    val omReader = mlirbcFile match {
+      case Some(path) => OMReader.fromFile(path, className)
+      case None =>
+        val stdin = new BufferedInputStream(System.in)
+        val bytes = Stream.continually(stdin.read).takeWhile(_ != -1).map(_.toByte).toArray
+        OMReader.fromBytes(bytes, className)
+    }
+    val t1Reader = omReader.t1Reader
+
+    if (eval.nonEmpty) {
+      println(SimpleInputEval(omReader.entryUnderlying, eval.get))
+    } else if (dumpMethods.value) {
+      t1Reader.dumpMethods()
+    } else {
+      t1Reader.dumpAll()
+    }
+  }
+
+  @main
+  def vlen(@arg(name = "mlirbc-file") mlirbcFile: os.Path) = {
+    println(simplyGetT1Reader(mlirbcFile).vlen)
+  }
+
+  @main
+  def dlen(@arg(name = "mlirbc-file") mlirbcFile: os.Path) = {
+    println(simplyGetT1Reader(mlirbcFile).dlen)
+  }
+
+  def simplyGetT1Reader(mlirbcFile: os.Path) = OMReader.fromFile(mlirbcFile, "T1Subsystem_Class").t1Reader
+
+  def main(args: Array[String]): Unit = ParserForMethods(this).runOrExit(args)
+}
+
+object SimpleInputEval {
+  def apply(entry: PanamaCIRCTOMEvaluatorValue, input: String): PanamaCIRCTOMEvaluatorValue = {
+    input.split("\\.").foldLeft(entry) {
+      case (obj, field) =>
+        if (field.forall(_.isDigit)) {
+          obj.asInstanceOf[PanamaCIRCTOMEvaluatorValueList].getElement(field.toLong)
+        } else {
+          obj.asInstanceOf[PanamaCIRCTOMEvaluatorValueObject].field(field)
+        }
+    }
+  }
+}

omreaderlib/src/Interface.scala

@@ -0,0 +1,61 @@
+package org.chipsalliance.t1.omreaderlib
+
+import scala.reflect.runtime.universe._
+import chisel3.panamalib.option._
+import chisel3.panamaom._
+import chisel3.panamaconverter.PanamaCIRCTConverter
+
+object OMReader {
+  def fromFile(mlirbcFile: os.Path, className: String): OMReader = {
+    new OMReader(os.read.bytes(mlirbcFile), className)
+  }
+
+  def fromBytes(mlirbc: Array[Byte], className: String): OMReader = {
+    new OMReader(mlirbc, className)
+  }
+}
+
+class OMReader private(mlirbc: Array[Byte], className: String) {
+  private val cvt = PanamaCIRCTConverter.newWithMlirBc(mlirbc)
+
+  private val pm = cvt.passManager()
+  assert(pm.populatePreprocessTransforms())
+  assert(pm.populateCHIRRTLToLowFIRRTL())
+  assert(pm.populateLowFIRRTLToHW())
+  assert(pm.populateLowHWToSV())
+  assert(pm.populateExportVerilog(_ => ()))
+  assert(pm.populateFinalizeIR())
+  assert(pm.run())
+
+  private val om = cvt.om()
+  private val evaluator = om.evaluator()
+  private val entry = evaluator.instantiate(className, Seq(om.newBasePathEmpty))
+
+  def entryUnderlying: PanamaCIRCTOMEvaluatorValueObject = entry
+  def t1Reader: T1Reader = new T1Reader(entry)
+}
+
+class T1Reader private[omreaderlib](entry: PanamaCIRCTOMEvaluatorValueObject) {
+  private val om = entry.field("om").asInstanceOf[PanamaCIRCTOMEvaluatorValueObject]
+  private val t1 = om.field("t1").asInstanceOf[PanamaCIRCTOMEvaluatorValueObject]
+
+  def vlen: Long = t1.field("vlen").asInstanceOf[PanamaCIRCTOMEvaluatorValuePrimitiveInteger].integer
+  def dlen: Long = t1.field("dlen").asInstanceOf[PanamaCIRCTOMEvaluatorValuePrimitiveInteger].integer
+
+  def dumpMethods(): Unit = {
+    val mirror = runtimeMirror(getClass.getClassLoader).reflect(this)
+    val methods = typeOf[T1Reader].decls.toList.filter(
+        m => m.isPublic && m.isMethod && !m.isConstructor && !m.asMethod.isGetter
+    )
+    methods.foreach(method => {
+      if (!method.name.toString.startsWith("dump")) {
+        val value = mirror.reflectMethod(method.asMethod)()
+        println(s"${method.name} = $value")
+      }
+    })
+  }
+
+  def dumpAll(): Unit = {
+    entry.foreachField((name, value) => println(s".$name => $value"))
+  }
+}

t1/src/T1.scala

@@ -22,6 +22,18 @@ import org.chipsalliance.t1.rtl.vrf.{RamType, VRFParam, VRFProbe}
 //       3. Lane(Retime, VRF memory type, id, multiple instances(does it affect dedup? not for sure))
 @instantiable
 class T1OM extends Class {
+  @public
+  val vlen = IO(Output(Property[Int]()))
+  @public
+  val vlenIn = IO(Input(Property[Int]()))
+  vlen := vlenIn
+
+  @public
+  val dlen = IO(Output(Property[Int]()))
+  @public
+  val dlenIn = IO(Input(Property[Int]()))
+  dlen := dlenIn
+
   @public
   val lanes = IO(Output(Property[Seq[AnyClassType]]()))
   @public
@@ -264,6 +276,9 @@ class T1(val parameter: T1Parameter) extends Module with SerializableModule[T1Pa
   val om: Property[ClassType] = IO(Output(Property[omType.Type]()))
   om := omInstance.getPropertyReference
 
+  omInstance.vlenIn := Property(parameter.vLen)
+  omInstance.dlenIn := Property(parameter.dLen)
+
   /** request from CPU.
     * because the interrupt and exception of previous instruction is unpredictable,
     * and the `kill` logic in Vector processor is too high,