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[tests] add coverage for riscv-vector-tests
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Signed-off-by: Clo91eaf <[email protected]>
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Clo91eaf committed Dec 19, 2024
1 parent f868405 commit f25810f
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Showing 3 changed files with 33 additions and 11 deletions.
38 changes: 31 additions & 7 deletions script/emu/src/Main.scala
Original file line number Diff line number Diff line change
Expand Up @@ -44,13 +44,13 @@ object Main:
attr
) ++ extraArgs
os.proc(args).call().out.trim()

def resolveTestElfPath(
def resolveTestPath(
ip: String,
config: String,
caseName: String,
forceX86: Boolean = false
): os.Path =
): os.Path =
val casePath = os.Path(caseName, os.pwd)
if (os.exists(casePath)) then return casePath

Expand All @@ -61,11 +61,35 @@ object Main:
val nixStorePath = resolveNixPath(
s"${caseAttrRoot}t1.${config}.${ip}.cases.${caseName}"
)
val elfFilePath = os.Path(nixStorePath) / "bin" / s"${caseName}.elf"
val filePath = os.Path(nixStorePath)

filePath
end resolveTestPath

def resolveTestElfPath(
ip: String,
config: String,
caseName: String,
forceX86: Boolean = false
): os.Path =
val testPath = resolveTestPath(ip, config, caseName, forceX86)
val elfFilePath = testPath / "bin" / s"${caseName}.elf"

elfFilePath
end resolveTestElfPath

def resolveTestCoverPath(
ip: String,
config: String,
caseName: String,
forceX86: Boolean = false
): os.Path =
val testPath = resolveTestPath(ip, config, caseName, forceX86)
val coverFilePath = testPath / s"${caseName}.cover"

coverFilePath
end resolveTestCoverPath

def resolveTestBenchPath(
ip: String,
config: String,
Expand Down Expand Up @@ -203,8 +227,8 @@ object Main:
s"Using config=${BOLD}${finalConfig.get}${RESET} emulator=${BOLD}${finalEmuType.get}${RESET} case=${BOLD}$caseName${RESET}"
)

val caseElfPath =
resolveTestElfPath(finalIp.get, finalConfig.get, caseName, forceX86)
val caseElfPath = resolveTestElfPath(finalIp.get, finalConfig.get, caseName, forceX86)
val caseCoverPath = resolveTestCoverPath(finalIp.get, finalConfig.get, caseName, forceX86)
val outputPath = prepareOutputDir(outDir.getOrElse("t1-sim-result"))
val emulator = resolveTestBenchPath(finalIp.get, finalConfig.get, finalEmuType.get)

Expand All @@ -216,7 +240,7 @@ object Main:
)
++ optionals(timeout.isDefined, Seq(s"+t1_timeout=${timeout.getOrElse("unreachable")}"))
++ optionals(isTrace, Seq(s"+t1_wave_path=${outputPath / "wave.fsdb"}"))
++ optionals(isCover, Seq(s"-cm assert"))
++ optionals(isCover, Seq("-cm", "assert", "-assert", s"hier=${caseCoverPath}"))
++ optionals(!leftOverArguments.isEmpty, leftOverArguments)

if dryRun.value then return
Expand Down
2 changes: 2 additions & 0 deletions tests/codegen/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,8 @@ let
$CC $pname.S -T t1-ddr.ld $includeArgs -o $pname.elf
fi
echo "+assert ${caseName}" > $pname.cover
runHook postBuild
'';

Expand Down
4 changes: 0 additions & 4 deletions tests/mlir/hello/hello.json
Original file line number Diff line number Diff line change
Expand Up @@ -4,10 +4,6 @@
{
"description": "vmv.v.i instruction covered",
"name": "vmv_v_i"
},
{
"description": "vmv.v.x instruction covered",
"name": "vmv_v_x"
}
],
"tree": [],
Expand Down

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