[difftest] t1rocketemu: cleanup AXI read

difftest/dpi_t1rocketemu/src/dpi.rs

@@ -133,11 +133,12 @@ unsafe extern "C" fn axi_read_highBandwidthAXI(
   arprot={arprot}, arqos={arqos}, arregion={arregion})"
   );
   TARGET.with(|driver| {
-    assert_eq!(data_width as u32, driver.dlen);
+    let dlen = driver.dlen;
+    assert_eq!(data_width as u32, dlen);
     assert_eq!(arlen, 0);
 
-    let response = driver.axi_read_high_bandwidth(araddr as u32, arsize as u64);
-    fill_axi_read_payload(payload, driver.dlen, &response);
+    let response = driver.axi_read(araddr as u32, arsize as u32, dlen);
+    fill_axi_read_payload(payload, dlen, &response);
   });
 }
 
@@ -200,8 +201,8 @@ unsafe extern "C" fn axi_read_highOutstandingAXI(
     assert_eq!(data_width, 32);
     assert_eq!(arlen, 0);
 
-    let response = driver.axi_read_high_outstanding(araddr as u32, arsize as u64);
-    fill_axi_read_payload(payload, driver.dlen, &response);
+    let response = driver.axi_read(araddr as u32, arsize as u32, 32);
+    fill_axi_read_payload(payload, 32, &response);
   });
 }
 
@@ -269,8 +270,8 @@ unsafe extern "C" fn axi_read_loadStoreAXI(
     assert_eq!(data_width, 32);
     assert_eq!(arlen, 0);
 
-    let response = driver.axi_read_load_store(araddr as u32, arsize as u64);
-    fill_axi_read_payload(payload, driver.dlen, &response);
+    let response = driver.axi_read(araddr as u32, arsize as u32, 32);
+    fill_axi_read_payload(payload, 8 * 32, &response);
   });
 }
 
@@ -309,8 +310,8 @@ unsafe extern "C" fn axi_read_instructionFetchAXI(
 
     assert_eq!(8 * (1 << arsize), data_width);
 
-    let response = driver.axi_read_instruction_fetch(araddr as u32, arsize as u64);
-    fill_axi_read_payload(payload, driver.dlen, &response);
+    let response = driver.axi_read(araddr as u32, arsize as u32, 256);
+    fill_axi_read_payload(payload, 256, &response);
   });
 }
 

difftest/dpi_t1rocketemu/src/drive.rs

@@ -130,15 +130,10 @@ impl Driver {
     Ok((elf.ehdr.e_entry, mem, fn_sym_tab))
   }
 
-  pub(crate) fn axi_read_high_bandwidth(&mut self, addr: u32, arsize: u64) -> AxiReadPayload {
+  // data_width: AXI width (count in bits)
+  pub(crate) fn axi_read(&mut self, addr: u32, arsize: u32, data_width: u32) -> AxiReadPayload {
     let size = 1 << arsize;
-    let data = self.shadow_bus.read_mem_axi(addr, size, self.dlen / 8);
-    let data_hex = hex::encode(&data);
-    self.last_commit_cycle = get_t();
-    trace!(
-      "[{}] axi_read_high_bandwidth (addr={addr:#x}, size={size}, data={data_hex})",
-      get_t()
-    );
+    let data = self.shadow_bus.read_mem_axi(addr, size, data_width / 8);
     AxiReadPayload { data }
   }
 
@@ -159,19 +154,6 @@ impl Driver {
     );
   }
 
-  pub(crate) fn axi_read_high_outstanding(&mut self, addr: u32, arsize: u64) -> AxiReadPayload {
-    let size = 1 << arsize;
-    assert!(size <= 4);
-    let data = self.shadow_bus.read_mem_axi(addr, size, 4);
-    let data_hex = hex::encode(&data);
-    self.last_commit_cycle = get_t();
-    trace!(
-      "[{}] axi_read_high_outstanding (addr={addr:#x}, size={size}, data={data_hex})",
-      get_t()
-    );
-    AxiReadPayload { data }
-  }
-
   pub(crate) fn axi_write_high_outstanding(
     &mut self,
     addr: u32,
@@ -189,19 +171,6 @@ impl Driver {
     );
   }
 
-  pub(crate) fn axi_read_load_store(&mut self, addr: u32, arsize: u64) -> AxiReadPayload {
-    let size = 1 << arsize;
-    let bus_size = if size == 32 { 32 } else { 4 };
-    let data = self.shadow_bus.read_mem_axi(addr, size, bus_size);
-    let data_hex = hex::encode(&data);
-    self.last_commit_cycle = get_t();
-    trace!(
-      "[{}] axi_read_load_store (addr={addr:#x}, size={size}, data={data_hex})",
-      get_t()
-    );
-    AxiReadPayload { data }
-  }
-
   pub(crate) fn axi_write_load_store(
     &mut self,
     addr: u32,
@@ -231,17 +200,6 @@ impl Driver {
     }
   }
 
-  pub(crate) fn axi_read_instruction_fetch(&mut self, addr: u32, arsize: u64) -> AxiReadPayload {
-    let size = 1 << arsize;
-    let data = self.shadow_bus.read_mem_axi(addr, size, 32);
-    let data_hex = hex::encode(&data);
-    trace!(
-      "[{}] axi_read_instruction_fetch (addr={addr:#x}, size={size}, data={data_hex})",
-      get_t()
-    );
-    AxiReadPayload { data }
-  }
-
   pub(crate) fn watchdog(&mut self) -> u8 {
     const WATCHDOG_CONTINUE: u8 = 0;
     const WATCHDOG_TIMEOUT: u8 = 1;