[difftest] fix a bug in memory map route

chipsalliance · Dec 18, 2024 · 9963671 · 9963671
1 parent f8fdbe6
commit 9963671
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/difftest/dpi_t1rocketemu/src/interconnect.rs b/difftest/dpi_t1rocketemu/src/interconnect.rs
@@ -180,7 +180,7 @@ impl AddressSpace {
     for (idx, dev) in self.devices.iter().enumerate() {
       let (base, size) = dev.base_and_size;
       if base <= addr && addr - base < size {
-        return if addr - base + len < size {
+        return if addr - base + len <= size {
           Some(idx)
         } else {
           None