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[t1rocket] fix wrong quit check
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[t1rocket] add set scope for difftest quit
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Clo91eaf committed Aug 14, 2024
1 parent a800c2c commit 8cb0694
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Showing 2 changed files with 18 additions and 9 deletions.
5 changes: 4 additions & 1 deletion t1rocketemu/online_dpi/src/dpi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -330,7 +330,10 @@ pub(crate) fn dump_wave(scope: crate::svdpi::SvScope, path: &str) {
}
}

pub(crate) fn quit() {
pub(crate) fn quit(scope: crate::svdpi::SvScope) {
use crate::svdpi;

svdpi::set_scope(scope);
unsafe {
dpi_export::quit();
}
Expand Down
22 changes: 14 additions & 8 deletions t1rocketemu/online_dpi/src/drive.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
use crate::dpi::*;
use crate::{ get_t, EXIT_CODE, EXIT_POS };
use crate::svdpi::SvScope;
use crate::OfflineArgs;
use crate::{get_t, EXIT_CODE, EXIT_POS};

use anyhow::Context;
use common::MEM_SIZE;
Expand Down Expand Up @@ -336,17 +336,19 @@ impl Driver {
let data_hex = hex::encode(data);
self.last_commit_cycle = get_t();

// exit with code
if addr == EXIT_POS && data.len() == 4 && data == &EXIT_CODE.to_le_bytes() {
info!("exit successfully");
quit();
return;
}

trace!(
"[{}] axi_write_load_store (addr={addr:#x}, size={size}, data={data_hex})",
get_t()
);

// check exit with code
if addr == EXIT_POS {
let exit_data_slice = data[..4].try_into().expect("slice with incorrect length");
if u32::from_le_bytes(exit_data_slice) == EXIT_CODE {
info!("exit successfully");
self.quit()
}
}
}

pub(crate) fn axi_read_instruction_fetch(&mut self, addr: u32, arsize: u64) -> AxiReadPayload {
Expand Down Expand Up @@ -397,4 +399,8 @@ impl Driver {
fn start_dump_wave(&mut self) {
dump_wave(self.scope, &self.wave_path);
}

fn quit(&mut self) {
quit(self.scope)
}
}

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