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[difftest] fix wrong rd assignment
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Clo91eaf authored and Avimitin committed Jun 8, 2024
1 parent 57694b1 commit 7bbc84c
Showing 1 changed file with 2 additions and 3 deletions.
5 changes: 2 additions & 3 deletions difftest/t1-simulator/src/difftest/spike/spike_event.rs
Original file line number Diff line number Diff line change
Expand Up @@ -191,6 +191,8 @@ impl SpikeEvent {
}

pub fn pre_log_arch_changes(&mut self, spike: &Spike, vlen: u32) -> anyhow::Result<()> {
self.rd_bits = spike.get_proc().get_rd();

// record the vrf writes before executing the insn
let vlen_in_bytes = vlen;

Expand All @@ -205,9 +207,6 @@ impl SpikeEvent {
self.vd_write_record.vd_bytes[i as usize] = cur_byte;
}

if self.is_rd_fp {
self.rd_bits = spike.get_proc().get_rd();
}
Ok(())
}

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