[code] format.

chipsalliance · Dec 23, 2024 · 671eb79 · 671eb79
1 parent 1d8a2af
commit 671eb79
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/omreaderlib/src/t1/T1.scala b/omreaderlib/src/t1/T1.scala
@@ -20,11 +20,11 @@ class T1(val mlirbc: Array[Byte]) extends T1OMReaderAPI {
     t1("lanes").list.elements().map(_.obj("vrf").obj).flatMap(getSRAM)
 
   def permutation: Seq[Retime] = {
-    val permutation = t1("permutation")
-    val reduceUnit = permutation.obj("reduceUnit").obj
+    val permutation  = t1("permutation")
+    val reduceUnit   = permutation.obj("reduceUnit").obj
     val compressUnit = permutation.obj("compress").obj
     // TODO: need fieldOpt(name: String)
-    val floatAdder =
+    val floatAdder   =
       Option.when(reduceUnit.fieldNames().contains("floatAdder"))(reduceUnit("floatAdder").obj)
 
     (Seq(compressUnit) ++ floatAdder).flatMap(getRetime)