[build system] add elaborator to T1RocketTestbench

chipsalliance · Aug 26, 2024 · 32e33bc · 32e33bc
1 parent de660d8
commit 32e33bc
Showing 1 changed file with 46 additions and 24 deletions.
diff --git a/elaborator/src/Main.scala b/elaborator/src/Main.scala
@@ -7,6 +7,7 @@ import mainargs._
 import org.chipsalliance.t1.rtl.T1Parameter
 import org.chipsalliance.rocketv.RocketTileParameter
 import chisel3.panamalib.option._
+import org.chipsalliance.t1.tile.T1RocketTileParameter
 
 object Main {
   implicit object PathRead extends TokensReader.Simple[os.Path] {
@@ -28,11 +29,15 @@ object Main {
       ).foldLeft(
         Seq(
           chisel3.stage.ChiselGeneratorAnnotation(gen),
-          chisel3.panamaconverter.stage.FirtoolOptionsAnnotation(FirtoolOptions(Set(
-            BuildMode(BuildModeDebug),
-            PreserveValues(PreserveValuesModeNamed),
-            DisableUnknownAnnotations(true)
-          ))),
+          chisel3.panamaconverter.stage.FirtoolOptionsAnnotation(
+            FirtoolOptions(
+              Set(
+                BuildMode(BuildModeDebug),
+                PreserveValues(PreserveValuesModeNamed),
+                DisableUnknownAnnotations(true)
+              )
+            )
+          )
         ): firrtl.AnnotationSeq
       ) { case (annos, stage) => stage.transform(annos) }
         .flatMap {
@@ -42,9 +47,9 @@ object Main {
           case chisel3.panamaconverter.stage.PanamaCIRCTConverterAnnotation(converter) =>
             if (binderMlirbcOut.nonEmpty) panamaCIRCTConverter = converter
             None
-          case _: chisel3.panamaconverter.stage.FirtoolOptionsAnnotation  => None
-          case _: chisel3.stage.DesignAnnotation[_]                       => None
-          case _: chisel3.stage.ChiselCircuitAnnotation                   => None
+          case _: chisel3.panamaconverter.stage.FirtoolOptionsAnnotation => None
+          case _: chisel3.stage.DesignAnnotation[_]                      => None
+          case _: chisel3.stage.ChiselCircuitAnnotation                  => None
           case a => Some(a)
         }
 
@@ -63,31 +68,48 @@ object Main {
   case class IPConfig(
     @arg(name = "ip-config", short = 'c') ipConfig: os.Path) {
     def generator = upickle.default
-      .read[chisel3.experimental.SerializableModuleGenerator[org.chipsalliance.t1.rtl.T1, org.chipsalliance.t1.rtl.T1Parameter]](ujson.read(os.read(ipConfig)))
+      .read[chisel3.experimental.SerializableModuleGenerator[
+        org.chipsalliance.t1.rtl.T1,
+        org.chipsalliance.t1.rtl.T1Parameter
+      ]](ujson.read(os.read(ipConfig)))
     def parameter: T1Parameter = generator.parameter
   }
 
   case class RocketConfig(
     @arg(name = "rocket-config", short = 'c') rocketConfig: os.Path) {
     def generator = upickle.default
-      .read[chisel3.experimental.SerializableModuleGenerator[org.chipsalliance.rocketv.RocketTile, org.chipsalliance.rocketv.RocketTileParameter]](ujson.read(os.read(rocketConfig)))
+      .read[chisel3.experimental.SerializableModuleGenerator[
+        org.chipsalliance.rocketv.RocketTile,
+        org.chipsalliance.rocketv.RocketTileParameter
+      ]](ujson.read(os.read(rocketConfig)))
     def parameter: RocketTileParameter = generator.parameter
   }
 
-  implicit def ipConfig: ParserForClass[IPConfig] = ParserForClass[IPConfig]
-  implicit def rocketConfig: ParserForClass[RocketConfig] = ParserForClass[RocketConfig]
-
-  // format: off
-  @main def ip(elaborateConfig: ElaborateConfig, ipConfig: IPConfig): Unit = elaborateConfig.elaborate(() =>
-    ipConfig.generator.module()
-  )
-  @main def ipemu(elaborateConfig: ElaborateConfig, ipConfig: IPConfig): Unit = elaborateConfig.elaborate(() =>
-    new org.chipsalliance.t1.ipemu.TestBench(ipConfig.generator)
-  )
-  @main def rocketemu(elaborateConfig: ElaborateConfig, rocketConfig: RocketConfig): Unit = elaborateConfig.elaborate(() =>
-    new org.chipsalliance.t1.rocketv.TestBench(rocketConfig.generator)
-  )
-  // format: on
+  case class T1RocketConfig(
+    @arg(name = "t1rocket-config", short = 'c') rocketConfig: os.Path) {
+    def generator = upickle.default
+      .read[chisel3.experimental.SerializableModuleGenerator[
+        org.chipsalliance.t1.tile.T1RocketTile,
+        org.chipsalliance.t1.tile.T1RocketTileParameter
+      ]](ujson.read(os.read(rocketConfig)))
+    def parameter: T1RocketTileParameter = generator.parameter
+  }
+
+  implicit def ipConfig:       ParserForClass[IPConfig] = ParserForClass[IPConfig]
+  implicit def rocketConfig:   ParserForClass[RocketConfig] = ParserForClass[RocketConfig]
+  implicit def t1RocketConfig: ParserForClass[T1RocketConfig] = ParserForClass[T1RocketConfig]
+
+  @main def ip(elaborateConfig: ElaborateConfig, ipConfig: IPConfig): Unit =
+    elaborateConfig.elaborate(() => ipConfig.generator.module())
+
+  @main def ipemu(elaborateConfig: ElaborateConfig, ipConfig: IPConfig): Unit =
+    elaborateConfig.elaborate(() => new org.chipsalliance.t1.ipemu.TestBench(ipConfig.generator))
+
+  @main def rocketemu(elaborateConfig: ElaborateConfig, rocketConfig: RocketConfig): Unit =
+    elaborateConfig.elaborate(() => new org.chipsalliance.t1.rocketv.TestBench(rocketConfig.generator))
+
+  @main def t1rocketemu(elaborateConfig: ElaborateConfig, t1rocketConfig: T1RocketConfig): Unit =
+    elaborateConfig.elaborate(() => new org.chipsalliance.t1.t1rocketemu.TestBench(t1rocketConfig.generator))
 
   def main(args: Array[String]): Unit = ParserForMethods(this).runOrExit(args)
 }