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[tests] set float16 to false for all codegen cases
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Avimitin committed Dec 17, 2024
1 parent 8c91e5c commit 32144a6
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Expand Up @@ -29,6 +29,7 @@ let
${riscv-vector-test}/bin/single \
-VLEN "${builtins.toString rtlDesignMetadata.vlen}" \
-XLEN "${builtins.toString rtlDesignMetadata.xlen}" \
-float16 false \
-repeat 16 \
-testfloat3level 2 \
-configfile ${riscv-vector-test}/configs/${rawCaseName}.toml \
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