[spike] remove all custom CSR read from t1/rocket/t1rocket

Signed-off-by: Avimitin <[email protected]>

difftest/spike_interfaces/spike_interfaces.cc

@@ -2,8 +2,6 @@
 
 #include "spike_interfaces.h"
 
-constexpr uint32_t CSR_MSIMEND = 0x7cc;
-
 void *ffi_target;
 
 cfg_t make_spike_cfg() {
@@ -38,8 +36,6 @@ Spike::Spike(const char *set, const char *lvl,
   proc.VU.lane_num = lane_number;
   proc.VU.lane_granularity = 32;
 
-  auto &csrmap = proc.get_state()->csrmap;
-  csrmap[CSR_MSIMEND] = std::make_shared<basic_csr_t>(&proc, CSR_MSIMEND, 1);
   proc.enable_log_commits();
 }
 
@@ -233,11 +229,6 @@ uint8_t state_get_mem_read_size_by_byte(spike_state_t *state, uint32_t index) {
   return std::get<2>(state->s->log_mem_read[index]);
 }
 
-reg_t state_exit(spike_state_t *state) {
-  auto &csrmap = state->s->csrmap;
-  return csrmap[CSR_MSIMEND]->read();
-}
-
 void spike_register_callback(void *ffi_target_, ffi_callback callback) {
   ffi_addr_to_mem = callback;
   ffi_target = ffi_target_;

difftest/spike_interfaces/spike_interfaces_c.h

@@ -56,7 +56,6 @@ void state_clear(spike_state_t *state);
 void spike_destruct(spike_t *spike);
 void proc_destruct(spike_processor_t *proc);
 void state_destruct(spike_state_t *state);
-uint64_t state_exit(spike_state_t *state);
 
 #ifdef __cplusplus
 }

difftest/spike_rs/src/lib.rs

@@ -226,10 +226,6 @@ impl State {
   pub fn clear(&self) {
     unsafe { state_clear(self.state) }
   }
-
-  pub fn exit(&self) -> u64 {
-    unsafe { state_exit(self.state) }
-  }
 }
 
 impl Drop for State {
@@ -241,11 +237,7 @@ impl Drop for State {
 #[link(name = "spike_interfaces")]
 extern "C" {
   pub fn spike_register_callback(target: *mut (), callback: FfiCallback);
-  fn spike_new(
-    set: *const c_char,
-    lvl: *const c_char,
-    lane_number: usize,
-  ) -> *mut ();
+  fn spike_new(set: *const c_char, lvl: *const c_char, lane_number: usize) -> *mut ();
   fn spike_get_proc(spike: *mut ()) -> *mut ();
   fn spike_destruct(spike: *mut ());
   fn proc_disassemble(proc: *mut ()) -> *mut c_char;
@@ -283,5 +275,4 @@ extern "C" {
   fn state_set_mcycle(state: *mut (), mcycle: usize);
   fn state_clear(state: *mut ());
   fn state_destruct(state: *mut ());
-  fn state_exit(state: *mut ()) -> u64;
 }

difftest/test_common/src/spike_runner.rs

@@ -73,12 +73,6 @@ impl SpikeRunner {
 
     state.handle_pc(new_pc).unwrap();
 
-    let ret = state.exit();
-
-    if ret == 0 {
-      return Err(anyhow::anyhow!("simulation finished!"));
-    }
-
     Ok(())
   }
 

rocketemu/spike_rs/src/lib.rs

@@ -227,10 +227,6 @@ impl State {
   pub fn clear(&self) {
     unsafe { state_clear(self.state) }
   }
-
-  pub fn exit(&self) -> u64 {
-    unsafe { state_exit(self.state) }
-  }
 }
 
 impl Drop for State {
@@ -285,5 +281,4 @@ extern "C" {
   fn state_set_mcycle(state: *mut (), mcycle: usize);
   fn state_clear(state: *mut ());
   fn state_destruct(state: *mut ());
-  fn state_exit(state: *mut ()) -> u64;
 }

rocketemu/test_common/src/spike_runner.rs

@@ -61,12 +61,6 @@ impl SpikeRunner {
 
     state.handle_pc(new_pc).unwrap();
 
-    let ret = state.exit();
-
-    if ret == 0 {
-      return Err(anyhow::anyhow!("simulation finished!"));
-    }
-
     Ok(())
   }
 
@@ -83,7 +77,10 @@ impl SpikeRunner {
     state.clear();
 
     // inst is scalar
-    debug!("SpikeStep: spike run scalar insn ({})", event.describe_insn());
+    debug!(
+      "SpikeStep: spike run scalar insn ({})",
+      event.describe_insn()
+    );
     let new_pc = proc.func();
     event.log_mem_write(spike).unwrap();
     event.log_reg_write(spike).unwrap();

t1rocketemu/spike_interfaces/spike_interfaces.cc

@@ -2,8 +2,6 @@
 
 #include "spike_interfaces.h"
 
-constexpr uint32_t CSR_MSIMEND = 0x7cc;
-
 void *ffi_target;
 
 cfg_t make_spike_cfg() {
@@ -38,8 +36,6 @@ Spike::Spike(const char *set, const char *lvl,
   proc.VU.lane_num = lane_number;
   proc.VU.lane_granularity = 32;
 
-  auto &csrmap = proc.get_state()->csrmap;
-  csrmap[CSR_MSIMEND] = std::make_shared<basic_csr_t>(&proc, CSR_MSIMEND, 1);
   proc.enable_log_commits();
 }
 
@@ -233,11 +229,6 @@ uint8_t state_get_mem_read_size_by_byte(spike_state_t *state, uint32_t index) {
   return std::get<2>(state->s->log_mem_read[index]);
 }
 
-reg_t state_exit(spike_state_t *state) {
-  auto &csrmap = state->s->csrmap;
-  return csrmap[CSR_MSIMEND]->read();
-}
-
 void spike_register_callback(void *ffi_target_, ffi_callback callback) {
   ffi_addr_to_mem = callback;
   ffi_target = ffi_target_;

t1rocketemu/spike_interfaces/spike_interfaces_c.h

@@ -56,7 +56,6 @@ void state_clear(spike_state_t *state);
 void spike_destruct(spike_t *spike);
 void proc_destruct(spike_processor_t *proc);
 void state_destruct(spike_state_t *state);
-uint64_t state_exit(spike_state_t *state);
 
 #ifdef __cplusplus
 }

t1rocketemu/spike_rs/src/lib.rs

@@ -226,10 +226,6 @@ impl State {
   pub fn clear(&self) {
     unsafe { state_clear(self.state) }
   }
-
-  pub fn exit(&self) -> u64 {
-    unsafe { state_exit(self.state) }
-  }
 }
 
 impl Drop for State {
@@ -241,11 +237,7 @@ impl Drop for State {
 #[link(name = "spike_interfaces")]
 extern "C" {
   pub fn spike_register_callback(target: *mut (), callback: FfiCallback);
-  fn spike_new(
-    set: *const c_char,
-    lvl: *const c_char,
-    lane_number: usize,
-  ) -> *mut ();
+  fn spike_new(set: *const c_char, lvl: *const c_char, lane_number: usize) -> *mut ();
   fn spike_get_proc(spike: *mut ()) -> *mut ();
   fn spike_destruct(spike: *mut ());
   fn proc_disassemble(proc: *mut ()) -> *mut c_char;
@@ -283,5 +275,4 @@ extern "C" {
   fn state_set_mcycle(state: *mut (), mcycle: usize);
   fn state_clear(state: *mut ());
   fn state_destruct(state: *mut ());
-  fn state_exit(state: *mut ()) -> u64;
 }

t1rocketemu/test_common/src/spike_runner.rs

@@ -83,12 +83,6 @@ impl SpikeRunner {
 
     state.handle_pc(new_pc).unwrap();
 
-    let ret = state.exit();
-
-    if ret == 0 {
-      return Err(anyhow::anyhow!("simulation finished!"));
-    }
-
     Ok(())
   }