fix elabo

chipsalliance · Oct 14, 2024 · 116fb52 · 116fb52
1 parent dde4a1c
commit 116fb52
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Showing 3 changed files with 5 additions and 6 deletions.
diff --git a/elaborator/src/t1emu/Testbench.scala b/elaborator/src/t1emu/Testbench.scala
@@ -5,8 +5,8 @@ package org.chipsalliance.t1.elaborator.t1emu
 import chisel3.experimental.util.SerializableModuleElaborator
 import mainargs._
 import org.chipsalliance.t1.rtl.vrf.RamType
-import org.chipsalliance.t1.rtl.vrf.RamType.{p0rp1w, p0rw, p0rwp1rw}
-import org.chipsalliance.t1.rtl.{T1Parameter, VFUInstantiateParameter}
+import org.chipsalliance.t1.rtl.vrf.RamType.{p0rw, p0rp1w, p0rwp1rw}
+import org.chipsalliance.t1.rtl.{VFUInstantiateParameter, T1Parameter}
 import org.chipsalliance.t1.t1emu.TestBench
 
 object Testbench extends SerializableModuleElaborator {
@@ -47,7 +47,6 @@ object Testbench extends SerializableModuleElaborator {
         vlen.toInt
       }.get
 
-      if (zvbb) require(vfuInstantiateParameter == "zvbb")
       T1Parameter(
         dLen,
         extensions,

diff --git a/elaborator/src/t1rocket/T1RocketTile.scala b/elaborator/src/t1rocket/T1RocketTile.scala
@@ -87,7 +87,7 @@ object T1RocketTile extends SerializableModuleElaborator {
       }.get
       val fp   = instructionSets.contains("zve32f")
       val zvbb = instructionSets.contains("zvbb")
-      if (zvbb) require(vfuInstantiateParameter == "zvbb")
+
       T1RocketTileParameter(
         instructionSets: Seq[String],
         cacheBlockBytes: Int,

diff --git a/elaborator/src/t1rocketemu/Testbench.scala b/elaborator/src/t1rocketemu/Testbench.scala
@@ -8,7 +8,7 @@ import chisel3.util.experimental.BitSet
 import mainargs._
 import org.chipsalliance.t1.rtl.VFUInstantiateParameter
 import org.chipsalliance.t1.rtl.vrf.RamType
-import org.chipsalliance.t1.rtl.vrf.RamType.{p0rp1w, p0rw, p0rwp1rw}
+import org.chipsalliance.t1.rtl.vrf.RamType.{p0rw, p0rp1w, p0rwp1rw}
 import org.chipsalliance.t1.t1rocketemu.TestBench
 import org.chipsalliance.t1.tile.T1RocketTileParameter
 
@@ -88,7 +88,7 @@ object T1RocketTile extends SerializableModuleElaborator {
       }.get
       val fp   = instructionSets.contains("zve32f")
       val zvbb = instructionSets.contains("zvbb")
-      if (zvbb) require(vfuInstantiateParameter == "zvbb")
+
       T1RocketTileParameter(
         instructionSets: Seq[String],
         cacheBlockBytes: Int,