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Build(deps): Bump third_party/surelog from 5f6e20e to fbbe26e #5853

Build(deps): Bump third_party/surelog from 5f6e20e to fbbe26e

Build(deps): Bump third_party/surelog from 5f6e20e to fbbe26e #5853

Triggered via pull request September 11, 2024 07:28
Status Success
Total duration 1h 1m 30s
Artifacts 20

main.yml

on: pull_request
Matrix: build-binaries
Emit Workflow Info
0s
Emit Workflow Info
Style check
2m 1s
Style check
Test "Installation from source" from README
33m 18s
Test "Installation from source" from README
Upload GHA event file
3s
Upload GHA event file
Parsing Tests  /  SystemVerilog Plugin
41m 45s
Parsing Tests / SystemVerilog Plugin
Matrix: Large Designs Tests / opentitan_parse_report
Large Designs Tests  /  Ibex (Vivado synthesis)
6m 10s
Large Designs Tests / Ibex (Vivado synthesis)
Large Designs Tests  /  Ibex (F4PGA synthesis)
10m 55s
Large Designs Tests / Ibex (F4PGA synthesis)
Large Designs Tests  /  Opentitan 9d82960888 (synthesis)
29m 52s
Large Designs Tests / Opentitan 9d82960888 (synthesis)
Large Designs Tests  /  Opentitan (synthesis)
52m 4s
Large Designs Tests / Opentitan (synthesis)
Large Designs Tests  /  VeeR-EH1 (synthesis)
5m 24s
Large Designs Tests / VeeR-EH1 (synthesis)
Large Designs Tests  /  Black Parrot (AMD (Xilinx) FPGA synthesis)
16m 10s
Large Designs Tests / Black Parrot (AMD (Xilinx) FPGA synthesis)
Large Designs Tests  /  Black Parrot (ASIC synthesis)
36m 6s
Large Designs Tests / Black Parrot (ASIC synthesis)
Parsing Tests  /  Surelog
31m 3s
Parsing Tests / Surelog
Diff generated BSG Micro Designs tests  /  Parse and diff BSG Micro Designs
9m 59s
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs
Test With Bundled Yosys
3m 27s
Test With Bundled Yosys
Matrix: Formal Verification Tests / tests-formal-verification
Parsing Tests  /  Generate AST diff
5m 12s
Parsing Tests / Generate AST diff
Parsing Tests  /  Summary Generation
1m 40s
Parsing Tests / Summary Generation
Release Package
0s
Release Package
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Upload GHA event file
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/upload-artifact@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
Upload GHA event file
The following actions use a deprecated Node.js version and will be forced to run on node20: actions/upload-artifact@v2. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/
Large Designs Tests / VeeR-EH1 (synthesis)
No files were found with the provided path: tests/build/chipsalliance.org_cores_VeeR_EH1_1.9/synth-vivado/chipsalliance.org_cores_VeeR_EH1_1.9.edif. No artifacts will be uploaded.
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs
Some generated tests differ from the reference or were not generated at all. Check the test statuses in the workflow summary or `bsg_micro_designs_summary.md` in the artifacts.
Large Designs Tests / Black Parrot (ASIC synthesis)
No files were found with the provided path: build third_party/OpenROAD-flow-scripts/logs third_party/OpenROAD-flow-scripts/reports third_party/OpenROAD-flow-scripts/results. No artifacts will be uploaded.
Large Designs Tests / Opentitan (synthesis)
No files were found with the provided path: tests/build/lowrisc_systems_custom_tiny_chip_custom_tiny_nexysvideo_0.1/synth-yosys/lowrisc_systems_custom_tiny_chip_custom_tiny_nexysvideo_0.1.edif. No artifacts will be uploaded.
Deprecation notice: v1, v2, and v3 of the artifact actions
The following artifacts were uploaded using a version of actions/upload-artifact that is scheduled for deprecation: "binaries-asan", "binaries-plugin", "binaries-release", "bp_e_bp_unicore_cfg.edif", "bsg-logs", "bsg-outputs", "event.json", "formal-verification-logs", "lowrisc_ibex_top_artya7_surelog_0.1.bit", "lowrisc_systems_top_earlgrey_nexysvideo_0.1.bit", "opentitan-logs-full", "opentitan-logs-quick", "parsing_read-systemverilog_logs", "parsing_read-systemverilog_yosys-sv", "parsing_read-uhdm_logs", "parsing_read-uhdm_yosys-sv", "parsing_test-results", "plots", "tools", "top_artya7.bit". Please update your workflow to use v4 of the artifact actions. Learn more: https://github.blog/changelog/2024-04-16-deprecation-notice-v3-of-the-artifact-actions/

Artifacts

Produced during runtime
Name Size
binaries-asan
1.02 GB
binaries-plugin
139 MB
binaries-release
139 MB
bp_e_bp_unicore_cfg.edif
60.4 MB
bsg-logs
95.4 MB
bsg-outputs
13.6 MB
event.json
30.8 KB
formal-verification-logs
6.25 GB
lowrisc_ibex_top_artya7_surelog_0.1.bit
2.09 MB
lowrisc_systems_top_earlgrey_nexysvideo_0.1.bit
9.28 MB
opentitan-logs-full
165 MB
opentitan-logs-quick
39.4 MB
parsing_read-systemverilog_logs
16.1 MB
parsing_read-systemverilog_yosys-sv
350 KB
parsing_read-uhdm_logs
16.1 MB
parsing_read-uhdm_yosys-sv
348 KB
parsing_test-results Expired
23.7 KB
plots
20.5 MB
tools
96.8 MB
top_artya7.bit
2.09 MB