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porting tdo enable from jtag controller up to top level interface #423
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Reintegrate main -> dev-msft
Reintegrate main -> dev-msft
Reintegrate main -> dev-msft
…24 hours Increase ROM nightly regression timeout from 12 to 24 hours Related work items: #602523
…ets reg is modified Delay to let KV writes finish on all clients before clear_secrets reg is programmed to avoid reg update issues in UVM Related work items: #602886
updating wait state count to 67 to accommodate perf bug in soc ifc arb Wait state count worst case can last for two entire block reads from mailbox during the first/second block reads that occur with 2 clock delay (32 + 2 + 32 + 1) two full block reads, 2 clock delay between, and 1 clock delay for SRAM read. Related work items: #603171
…expected' txn Resolve UVM prediction bug by calculating if txn is expected closer to performing the reset prediction. This catches a missing 'expected' signal transition on mailbox_data_avail during a reset edge case. Related work items: #604229
…nternal Manual file-copy sync from GH 'dev-msft' to MSFT internal repo. Capture 1.0-rc2 updates for internal regressions. Related work items: #604278
Add updates to improve code coverage in UVM regressions: - Add extended checking in UVM regressions that throw errors for unexpected error interrupts from the SOC_IFC block (previously, the interrupts were serviced without being checked for context). - Add randomization constraints to make interesting test values on PAUSER more likely to occur - Update coverpoints for the RISC-V (VeeR) ECC error signals Related work items: #608192
Demote UVM_ERROR to UVM_INFO on unexpected transactions between cptra_rst_b->cptra_noncore_rst_b (this is a legal scenario) Related work items: #608843
Updates to UVM to delay KV clear by 1 clk when clear_secrets reg is set Updates to sequence to turn on scan mode, perform writes and then turn off scan mode Related work items: #609997
…fw upd rst Add assertions for bus-idle condition during fw upd rst Related work items: #610696
Reenable cg tests in L0 regression Related work items: #610712
Disable verbose trace logs by default to reduce disk requirement for regressions Also fix a typo in an assertion error message Related work items: #611074, #613438
Dev msft 20240118
Merge dev-msft -> dev-integrate
Merge dev-integrate -> main
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Can you do the same change for UVM hdl_top.sv
calebofearth
approved these changes
Feb 20, 2024
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Adding jtag tdo enable port to caliptra interface
closes 415