better parameterized mbox

.dvt/build.config.xml

@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<build-config version="2">
+    <current-build-name>default</current-build-name>
+    <design-hierarchy-top language=""/>
+    <design-hierarchy-top-elab language=""/>
+    <verification-hierarchy-top language=""/>
+</build-config>

.dvt/default.build

@@ -0,0 +1,3 @@
+# Automatically identify and compile all the source files in the project directory.
+# DO NOT explicitly list files/directories in 'dvt_init_auto' sections. Use 'dvt_init' sections instead.
++dvt_init_auto

.dvt/default.ls

@@ -0,0 +1,3 @@
+heap_size=3072m
+stack_size=4m
+lang=vlog

src/axi/rtl/axi_dma_ctrl.sv

@@ -19,7 +19,6 @@
 module axi_dma_ctrl
 import axi_pkg::*;
 import soc_ifc_pkg::*;
-import mbox_pkg::*;
 #(
     parameter AW = 64,
     parameter DW = 32,         // Data Width
@@ -355,7 +354,7 @@ import mbox_pkg::*;
         endcase
         cmd_inv_byte_count  = |hwif_out.byte_count.count.value[BW-1:0] ||
                               (hwif_out.byte_count.count.value > DMA_MAX_XFER_SIZE) ||
-                              (hwif_out.byte_count.count.value > MBOX_SIZE_BYTES &&
+                              (hwif_out.byte_count.count.value > CPTRA_MBOX_SIZE_BYTES &&
                                ((hwif_out.ctrl.rd_route.value == axi_dma_reg__ctrl__rd_route__rd_route_e__MBOX) ||
                                 (hwif_out.ctrl.wr_route.value == axi_dma_reg__ctrl__wr_route__wr_route_e__MBOX)));
         // power of 2 and word-aligned
@@ -717,7 +716,7 @@ import mbox_pkg::*;
     `CALIPTRA_ASSERT(AXI_DMA_VLD_WR_REQ_BND, wr_req_hshake |-> w_req_if.addr[AW-1:AXI_LEN_BC_WIDTH] == ((w_req_if.addr + w_req_if.byte_len) >> AXI_LEN_BC_WIDTH), clk, !rst_n)
     // Proper configuration
     `CALIPTRA_ASSERT_INIT(AXI_DMA_DW_32, DW == 32)
-    `CALIPTRA_ASSERT_INIT(AXI_DMA_DW_EQ_MB, DW == MBOX_DATA_W)
+    `CALIPTRA_ASSERT_INIT(AXI_DMA_DW_EQ_MB, DW == CPTRA_MBOX_DATA_W)
     // FIFO must have space for all requested data
     `CALIPTRA_ASSERT(AXI_DMA_LIM_RD_CRED, rd_credits <= FIFO_BC/BC, clk, !rst_n)
     `CALIPTRA_ASSERT(AXI_DMA_OFL_RD_CRED, rd_req_hshake |-> rd_req_byte_count <= FIFO_BC, clk, !rst_n)

src/integration/rtl/caliptra_top.sv

@@ -21,7 +21,6 @@ module caliptra_top
     import kv_defines_pkg::*;
     import pv_defines_pkg::*;
     import soc_ifc_pkg::*;
-    import mbox_pkg::*;
     import lc_ctrl_state_pkg::*;
     import lc_ctrl_reg_pkg::*;
     import lc_ctrl_pkg::*;
@@ -60,9 +59,9 @@ module caliptra_top
     //SRAM interface for mbox
     output logic mbox_sram_cs,
     output logic mbox_sram_we,
-    output logic [MBOX_ADDR_W-1:0] mbox_sram_addr,
-    output logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata,
-    input  logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_rdata,
+    output logic [CPTRA_MBOX_ADDR_W-1:0] mbox_sram_addr,
+    output logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata,
+    input  logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_rdata,
 
     //SRAM interface for imem
     output logic imem_cs,
@@ -253,8 +252,8 @@ module caliptra_top
     pcr_signing_t pcr_signing_data;
 
     //mailbox sram gasket
-    mbox_sram_req_t mbox_sram_req;
-    mbox_sram_resp_t mbox_sram_resp;
+    cptra_mbox_sram_req_t mbox_sram_req;
+    cptra_mbox_sram_resp_t mbox_sram_resp;
 
     logic clear_obf_secrets;
     logic scan_mode_switch;

src/integration/tb/caliptra_top_tb.sv

@@ -30,7 +30,6 @@ module caliptra_top_tb (
 
     import axi_pkg::*;
     import soc_ifc_pkg::*;
-    import mbox_pkg::*;
     import caliptra_top_tb_pkg::*;
 
 `ifndef VERILATOR
@@ -95,9 +94,9 @@ module caliptra_top_tb (
     logic mailbox_data_avail;
     logic mbox_sram_cs;
     logic mbox_sram_we;
-    logic [MBOX_ADDR_W-1:0] mbox_sram_addr;
-    logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata;
-    logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_rdata;
+    logic [CPTRA_MBOX_ADDR_W-1:0] mbox_sram_addr;
+    logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata;
+    logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_rdata;
 
     logic imem_cs;
     logic [`CALIPTRA_IMEM_ADDR_WIDTH-1:0] imem_addr;

src/integration/tb/caliptra_top_tb_pkg.sv

@@ -15,12 +15,11 @@
 
 package caliptra_top_tb_pkg;
 import soc_ifc_pkg::*;
-import mbox_pkg::*;
 
 `ifndef VERILATOR
-class bitflip_mask_generator #(int MBOX_DATA_AND_ECC_W = 39);
+class bitflip_mask_generator #(int CPTRA_MBOX_DATA_AND_ECC_W = 39);
 
-    rand logic [MBOX_DATA_AND_ECC_W-1:0] rand_sram_bitflip_mask;
+    rand logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] rand_sram_bitflip_mask;
     logic do_double_bitflip;
     constraint bitflip_c {
         if (do_double_bitflip) {
@@ -35,16 +34,16 @@ class bitflip_mask_generator #(int MBOX_DATA_AND_ECC_W = 39);
         this.do_double_bitflip = 1'b0;
     endfunction
 
-    function logic [MBOX_DATA_AND_ECC_W-1:0] get_mask(bit do_double_bit = 1'b0);
+    function logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] get_mask(bit do_double_bit = 1'b0);
         this.do_double_bitflip = do_double_bit;
         this.randomize();
         return this.rand_sram_bitflip_mask;
     endfunction
 
 endclass
 `else
-function static logic [mbox_pkg::MBOX_DATA_AND_ECC_W-1:0] get_bitflip_mask(bit do_double_bit = 1'b0);
-    return 2<<($urandom%(mbox_pkg::MBOX_DATA_AND_ECC_W-2)) | mbox_pkg::MBOX_DATA_AND_ECC_W'(do_double_bit);
+function static logic [soc_ifc_pkg::CPTRA_MBOX_DATA_AND_ECC_W-1:0] get_bitflip_mask(bit do_double_bit = 1'b0);
+    return 2<<($urandom%(soc_ifc_pkg::CPTRA_MBOX_DATA_AND_ECC_W-2)) | soc_ifc_pkg::CPTRA_MBOX_DATA_AND_ECC_W'(do_double_bit);
 endfunction
 `endif
 

src/integration/tb/caliptra_top_tb_services.sv

@@ -34,8 +34,7 @@
 
 
 module caliptra_top_tb_services 
-    import soc_ifc_pkg::*; 
-    import mbox_pkg::*;
+    import soc_ifc_pkg::*;
     import kv_defines_pkg::*;
     import caliptra_top_tb_pkg::*;
 #(
@@ -51,9 +50,9 @@ module caliptra_top_tb_services
     //SRAM interface for mbox
     input  wire logic mbox_sram_cs,
     input  wire logic mbox_sram_we,
-    input  wire logic [MBOX_ADDR_W-1:0] mbox_sram_addr,
-    input  wire logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata,
-    output wire logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_rdata,
+    input  wire logic [CPTRA_MBOX_ADDR_W-1:0] mbox_sram_addr,
+    input  wire logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata,
+    output wire logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_rdata,
 
     //SRAM interface for imem
     input  wire logic imem_cs,
@@ -141,7 +140,7 @@ module caliptra_top_tb_services
 
     string                      abi_reg[32]; // ABI register names
 
-    logic [MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata_bitflip;
+    logic [CPTRA_MBOX_DATA_AND_ECC_W-1:0] mbox_sram_wdata_bitflip;
     int cycleCntKillReq;
 
     int                         cycleCnt_ff;
@@ -1386,7 +1385,7 @@ endgenerate //IV_NO
 
     `ifndef VERILATOR
         initial begin
-            automatic bitflip_mask_generator #(MBOX_DATA_AND_ECC_W) bitflip_gen = new();
+            automatic bitflip_mask_generator #(CPTRA_MBOX_DATA_AND_ECC_W) bitflip_gen = new();
             forever begin
                 @(posedge clk)
                 if (~|inject_mbox_sram_error) begin
@@ -1663,8 +1662,8 @@ caliptra_veer_sram_export veer_sram_export_inst (
 //SRAM for mbox (preload raw data here)
 caliptra_sram 
 #(
-    .DATA_WIDTH(MBOX_DATA_W),
-    .DEPTH     (MBOX_DEPTH )
+    .DATA_WIDTH(CPTRA_MBOX_DATA_W),
+    .DEPTH     (CPTRA_MBOX_DEPTH )
 )
 dummy_mbox_preloader
 (
@@ -1680,8 +1679,8 @@ dummy_mbox_preloader
 // dummy_mbox_preloader with ECC bits appended
 caliptra_sram 
 #(
-    .DATA_WIDTH(MBOX_DATA_AND_ECC_W),
-    .DEPTH     (MBOX_DEPTH         )
+    .DATA_WIDTH(CPTRA_MBOX_DATA_AND_ECC_W),
+    .DEPTH     (CPTRA_MBOX_DEPTH         )
 )
 mbox_ram1
 (
@@ -1751,19 +1750,19 @@ caliptra_sram #(
    //=========================================================================-
 task static preload_mbox;
     // Variables
-    mbox_sram_data_t         ecc_data;
-    bit [MBOX_ADDR_W:0] addr;
+    cptra_mbox_sram_data_t         ecc_data;
+    bit [CPTRA_MBOX_ADDR_W:0] addr;
     int                      byt;
-    localparam NUM_BYTES = MBOX_DATA_AND_ECC_W / 8 + ((MBOX_DATA_AND_ECC_W%8) ? 1 : 0);
+    localparam NUM_BYTES = CPTRA_MBOX_DATA_AND_ECC_W / 8 + ((CPTRA_MBOX_DATA_AND_ECC_W%8) ? 1 : 0);
 
     // Init
     `ifndef VERILATOR
     mbox_ram1.ram = '{default:8'h0};
     `endif
 
     // Slam
-    $display("MBOX pre-load from %h to %h", 0, MBOX_DEPTH);
-    for (addr = 0; addr < MBOX_DEPTH; addr++) begin
+    $display("MBOX pre-load from %h to %h", 0, CPTRA_MBOX_DEPTH);
+    for (addr = 0; addr < CPTRA_MBOX_DEPTH; addr++) begin
         ecc_data.data = {dummy_mbox_preloader.ram[addr][3],
                          dummy_mbox_preloader.ram[addr][2],
                          dummy_mbox_preloader.ram[addr][1],

src/integration/test_suites/includes/caliptra_defines.h

@@ -73,7 +73,7 @@
 #define HMAC512_MODE              0x1
 
 /* ---- Mailbox ---- */
-#define MBOX_DIR_SPAN             CLP_MBOX_SRAM_BASE_ADDR - CLP_MBOX_SRAM_END_ADDR + 1 /* 256 KiB */
+#define MBOX_DIR_SPAN             CLP_MBOX_SRAM_END_ADDR - CLP_MBOX_SRAM_BASE_ADDR + 1 /* 256 KiB */
 #define STDOUT                    CLP_SOC_IFC_REG_CPTRA_GENERIC_OUTPUT_WIRES_0
 
 /* ---- ECC ----*/

src/soc_ifc/coverage/soc_ifc_cov_if.sv

@@ -111,8 +111,8 @@ interface soc_ifc_cov_if
     input wire              timer_intr,
 
     //SRAM interface
-    input mbox_sram_req_t  mbox_sram_req,
-    input mbox_sram_resp_t mbox_sram_resp,
+    input cptra_mbox_sram_req_t  mbox_sram_req,
+    input cptra_mbox_sram_resp_t mbox_sram_resp,
 
     // RV ECC Status Interface
     input rv_ecc_sts_t rv_ecc_sts,
@@ -368,9 +368,9 @@ interface soc_ifc_cov_if
         dlen_in_dws_cp: coverpoint i_mbox.dlen_in_dws {
           bins zero = {0};
           bins one = {1};
-          bins range[32] = {[2:MBOX_SIZE_DWORDS-2]};
-          bins almost_full = {MBOX_SIZE_DWORDS-1};
-          bins full = {MBOX_SIZE_DWORDS};}
+          bins range[32] = {[2:CPTRA_MBOX_SIZE_DWORDS-2]};
+          bins almost_full = {CPTRA_MBOX_SIZE_DWORDS-1};
+          bins full = {CPTRA_MBOX_SIZE_DWORDS};}
 
         sram_single_ecc_error_cp: coverpoint i_mbox.sram_single_ecc_error;
         sram_double_ecc_error_cp: coverpoint i_mbox.sram_double_ecc_error;
@@ -382,7 +382,7 @@ interface soc_ifc_cov_if
         sha_sram_hold_cp: coverpoint i_mbox.sha_sram_hold;
 
         //special scenarios - only care about bin of 1
-        dlen_gt_mbox_size_cp: coverpoint i_mbox.hwif_out.mbox_dlen.length.value > MBOX_SIZE_BYTES {
+        dlen_gt_mbox_size_cp: coverpoint i_mbox.hwif_out.mbox_dlen.length.value > CPTRA_MBOX_SIZE_BYTES {
             option.comment = "DLEN is programmed greater than mailbox size";
             bins one = {1};}
         req_wrptr_gt_dlen_cp: coverpoint (mbox_fsm_ps == MBOX_RDY_FOR_DATA) & (i_mbox.mbox_wrptr > i_mbox.dlen_in_dws) {
@@ -397,7 +397,7 @@ interface soc_ifc_cov_if
         rdptr_gt_dlen_cp: coverpoint i_mbox.inc_rdptr & ~(i_mbox.mbox_rdptr <= i_mbox.dlen_in_dws) {
             option.comment = "Read pointer tried to increment passed DLEN";
             bins one = {1};}
-        rdptr_rollover_cp: coverpoint i_mbox.inc_rdptr & ~(i_mbox.mbox_rdptr < (MBOX_SIZE_DWORDS-1)) {
+        rdptr_rollover_cp: coverpoint i_mbox.inc_rdptr & ~(i_mbox.mbox_rdptr < (CPTRA_MBOX_SIZE_DWORDS-1)) {
             option.comment = "Read pointer tried to increment passed mailbox size";
             bins one = {1};}