updated ecc uvm and cov for ecdh changes (#585)

* updated ecc uvm and cov for ecdh changes * MICROSOFT AUTOMATED PIPELINE: Stamp 'mojtaba-ecdh-uvm' with updated timestamp and hash after successful run --------- Co-authored-by: Mojtaba Bisheh Niasar <[email protected]>
chipsalliance · Sep 9, 2024 · 1852cfc · 1852cfc
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commit 1852cfc
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Showing 4 changed files with 17 additions and 19 deletions.
diff --git a/.github/workflow_metadata/pr_hash b/.github/workflow_metadata/pr_hash
@@ -1 +1 @@
-8d77579899d273d139ab694b86e53b0ea7190c82c0657fe7662bdf277082b8ebebc199ba4e6716749af22f1cf0f22413
+f3cb8ff4aa4c7b5a753ebf231de215e8ce1934d851bf919332b53f0042fe2e151aa82a4ec67a58e448f1a4ebf2d14d3c
diff --git a/.github/workflow_metadata/pr_timestamp b/.github/workflow_metadata/pr_timestamp
@@ -1 +1 @@
-1725477264
+1725662210
diff --git a/src/ecc/coverage/ecc_top_cov_if.sv b/src/ecc/coverage/ecc_top_cov_if.sv
@@ -22,8 +22,8 @@ interface ecc_top_cov_if
 
 );
 
-    logic [1 : 0] ecc_cmd;
-    logic [1 : 0] ecc_sw_cmd;
+    logic [2 : 0] ecc_cmd;
+    logic [2 : 0] ecc_sw_cmd;
     logic zeroize;
     logic pcr_sign_mode;
     logic ready;
@@ -44,6 +44,7 @@ interface ecc_top_cov_if
     logic keygen_process;
     logic signing_process;
     logic verifying_process;
+    logic sharedkey_process;
 
 
     logic mod_p_q;
@@ -85,7 +86,8 @@ interface ecc_top_cov_if
             ecc_sw_cmd <= '0;
         end
         else if (ecc_top.ecc_reg1.decoded_reg_strb.ECC_CTRL && ecc_top.ecc_reg1.decoded_req_is_wr) begin // SW write
-            ecc_sw_cmd <= (ecc_top.ecc_reg1.field_storage.ECC_CTRL.CTRL.value & ~ecc_top.ecc_reg1.decoded_wr_biten[1:0]) | (ecc_top.ecc_reg1.decoded_wr_data[1:0] & ecc_top.ecc_reg1.decoded_wr_biten[1:0]);
+            ecc_sw_cmd[1:0] <= (ecc_top.ecc_reg1.field_storage.ECC_CTRL.CTRL.value & ~ecc_top.ecc_reg1.decoded_wr_biten[1:0]) | (ecc_top.ecc_reg1.decoded_wr_data[1:0] & ecc_top.ecc_reg1.decoded_wr_biten[1:0]);
+            ecc_sw_cmd[2] <= (ecc_top.ecc_reg1.field_storage.ECC_CTRL.DH_SHAREDKEY.value & ~ecc_top.ecc_reg1.decoded_wr_biten[4]) | (ecc_top.ecc_reg1.decoded_wr_data[4] & ecc_top.ecc_reg1.decoded_wr_biten[4]);
         end
     end
 
@@ -104,6 +106,7 @@ interface ecc_top_cov_if
     assign keygen_process = ecc_top.ecc_dsa_ctrl_i.keygen_process;
     assign signing_process = ecc_top.ecc_dsa_ctrl_i.signing_process;
     assign verifying_process = ecc_top.ecc_dsa_ctrl_i.verifying_process;
+    assign sharedkey_process = ecc_top.ecc_dsa_ctrl_i.sharedkey_process;
 
     covergroup ecc_top_cov_grp @(posedge clk);
         reset_cp: coverpoint reset_n;
@@ -140,6 +143,7 @@ interface ecc_top_cov_if
         error_keygen_cp: cross error_flag, keygen_process;
         error_signing_cp: cross error_flag, signing_process;
         error_verifying_cp: cross error_flag, verifying_process;
+        error_sharedkey_cp: cross error_flag, sharedkey_process;
 
         // modular operation
         mult_final_subtraction_cp: coverpoint mult_final_subtraction;

diff --git a/...mf_template_output/verification_ip/interface_packages/ECC_in_pkg/src/ECC_in_driver_bfm.sv b/...mf_template_output/verification_ip/interface_packages/ECC_in_pkg/src/ECC_in_driver_bfm.sv
@@ -311,10 +311,11 @@ end
   parameter ADDR_VERSION1    = BASE_ADDR + 32'h0000000C;
 
   parameter ADDR_CTRL        = BASE_ADDR + 32'h00000010;
-  parameter KEYGEN           = 3'b001;
-  parameter SIGN             = 3'b010;
-  parameter VERIFY           = 3'b011;
-  parameter DH_SHARED        = 3'b100;
+  parameter KEYGEN           = 2'b01;
+  parameter SIGN             = 2'b10;
+  parameter VERIFY           = 2'b11;
+  parameter DH_SHARED        = (1 << 4);
+
 
   parameter ADDR_STATUS          = BASE_ADDR + 32'h00000018;
   parameter STATUS_READY_BIT = 0;
@@ -353,21 +354,14 @@ end
   localparam ADDR_PRIVKEY_IN_START   = BASE_ADDR + 32'h00000580;
   localparam ADDR_PRIVKEY_IN_END     = BASE_ADDR + 32'h000005AC;
 
-  parameter ADDR_DH_SHARED_KEY_START = BASE_ADDR + 32'h00000600;
-  parameter ADDR_DH_SHARED_KEY_END   = BASE_ADDR + 32'h0000062C;
+  parameter ADDR_DH_SHARED_KEY_START = BASE_ADDR + 32'h000005C0;
+  parameter ADDR_DH_SHARED_KEY_END   = BASE_ADDR + 32'h000005EC;
 
   parameter REG_SIZE      = 384;
   parameter PRIME         = 384'hfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffeffffffff0000000000000000ffffffff;
   parameter ADD_NUM_ADDS  = 1;
   parameter ADD_BASE_SZ   = 384;
 
-
-  localparam NOP_CMD        = 3'b000;
-  localparam KEYGEN_CMD     = 3'b001;
-  localparam SIGN_CMD       = 3'b010;
-  localparam VERIFY_CMD     = 3'b100;
-  // localparam DH_SHARED_CMD  = 3'b100;
-
   parameter AHB_HTRANS_IDLE     = 0;
   parameter AHB_HTRANS_BUSY     = 1;
   parameter AHB_HTRANS_NONSEQ   = 2;
@@ -628,7 +622,7 @@ end
   //----------------------------------------------------------------
   // trig_ECC()
   //----------------------------------------------------------------
-  task trig_ECC(input [3 : 0] cmd);
+  task trig_ECC(input [31 : 0] cmd);
     begin
       write_single_word(ADDR_CTRL  , cmd);
       repeat (10) @(posedge clk_i);