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refactor: fix hicpp-multiway-paths-covered lint errors
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edubart committed Oct 17, 2024
1 parent 6889836 commit 8740c8b
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Showing 3 changed files with 45 additions and 52 deletions.
1 change: 0 additions & 1 deletion .clang-tidy
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,6 @@ Checks: >-
-google-build-using-namespace,
hicpp*,
-hicpp-avoid-c-arrays,
-hicpp-multiway-paths-covered,
-hicpp-no-array-decay,
-hicpp-no-malloc,
-hicpp-signed-bitwise,
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12 changes: 5 additions & 7 deletions src/plic.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -180,14 +180,12 @@ static execute_status plic_write(void * /*context*/, i_device_state_access *a, u
return execute_status::failure;
}

switch (offset) {
case plic_csr_rel_addr::claim_complete:
return plic_write_claim_complete(a, val);
default:
// Most CSRs in PLIC spec are WARL,
// therefore we just ignore writes
return execute_status::success;
if (offset == plic_csr_rel_addr::claim_complete) {
return plic_write_claim_complete(a, val);
}
// Most CSRs in PLIC spec are WARL,
// therefore we just ignore writes
return execute_status::success;
}

void plic_set_pending_irq(i_device_state_access *a, uint32_t irq_id) {
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84 changes: 40 additions & 44 deletions src/uarch-bridge.h
Original file line number Diff line number Diff line change
Expand Up @@ -911,25 +911,23 @@ class uarch_bridge {
const tlb_hot_entry &tlbhe = s.tlb.hot[etype][eidx];
const tlb_cold_entry &tlbce = s.tlb.cold[etype][eidx];
if (hot) {
switch (fieldoff) {
case offsetof(tlb_hot_entry, vaddr_page):
*pval = tlbhe.vaddr_page;
return true;
default:
// Other fields like vh_offset contains host data, and cannot be read
return false;
}
} else {
switch (fieldoff) {
case offsetof(tlb_cold_entry, paddr_page):
*pval = tlbce.paddr_page;
return true;
case offsetof(tlb_cold_entry, pma_index):
*pval = tlbce.pma_index;
return true;
default:
return false;
if (fieldoff == offsetof(tlb_hot_entry, vaddr_page)) {
*pval = tlbhe.vaddr_page;
return true;
}
// Other fields like vh_offset contains host data, and cannot be read
return false;
}
// Cold
switch (fieldoff) {
case offsetof(tlb_cold_entry, paddr_page):
*pval = tlbce.paddr_page;
return true;
case offsetof(tlb_cold_entry, pma_index):
*pval = tlbce.pma_index;
return true;
default:
return false;
}
}

Expand All @@ -949,33 +947,31 @@ class uarch_bridge {
tlb_hot_entry &tlbhe = s.tlb.hot[etype][eidx];
tlb_cold_entry &tlbce = s.tlb.cold[etype][eidx];
if (hot) {
switch (fieldoff) {
case offsetof(tlb_hot_entry, vaddr_page):
tlbhe.vaddr_page = val;
// Update vh_offset
if (val != TLB_INVALID_PAGE) {
const pma_entry &pma = find_pma_entry<uint64_t>(s, tlbce.paddr_page);
assert(pma.get_istart_M()); // TLB only works for memory mapped PMAs
const unsigned char *hpage =
pma.get_memory().get_host_memory() + (tlbce.paddr_page - pma.get_start());
tlbhe.vh_offset = cast_ptr_to_addr<uint64_t>(hpage) - tlbhe.vaddr_page;
}
return true;
default:
// Other fields like vh_offset contains host data, and cannot be written
return false;
}
} else {
switch (fieldoff) {
case offsetof(tlb_cold_entry, paddr_page):
tlbce.paddr_page = val;
return true;
case offsetof(tlb_cold_entry, pma_index):
tlbce.pma_index = val;
return true;
default:
return false;
if (fieldoff == offsetof(tlb_hot_entry, vaddr_page)) {
tlbhe.vaddr_page = val;
// Update vh_offset
if (val != TLB_INVALID_PAGE) {
const pma_entry &pma = find_pma_entry<uint64_t>(s, tlbce.paddr_page);
assert(pma.get_istart_M()); // TLB only works for memory mapped PMAs
const unsigned char *hpage =
pma.get_memory().get_host_memory() + (tlbce.paddr_page - pma.get_start());
tlbhe.vh_offset = cast_ptr_to_addr<uint64_t>(hpage) - tlbhe.vaddr_page;
}
return true;
}
// Other fields like vh_offset contains host data, and cannot be written
return false;
}
// Cold
switch (fieldoff) {
case offsetof(tlb_cold_entry, paddr_page):
tlbce.paddr_page = val;
return true;
case offsetof(tlb_cold_entry, pma_index):
tlbce.pma_index = val;
return true;
default:
return false;
}
}

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