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steveri edited this page Mar 20, 2024 · 2 revisions

AHA Wiki Table of Contents

Development and Debugging

Hardware Architecture

  • Mem Tile -- An overview of the CGRA memory tile architecture.

Software Architecture

  • H2H Description -- Apps are written in the Halide language.
    Halide-to-Hardware (H2H) automatically generates custom hardware for running the app.

  • Design files hold metadata used by tools in the design flow

  • Lake Repo Explain -- Lake is our DSL for generating memory tiles
    Should this maybe just be a pointer to Lake's README file?

  • PnR -- The AHA place-and-route tool, for mapping apps onto our CGRA.

  • Garnet Daemon -- Use garnet.py --daemon for faster turnaround on dense-app PNR.

Documentation

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