Skip to content
View Eskilrl's full-sized avatar

Block or report Eskilrl

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. Robottkrig_V24 Robottkrig_V24 Public

    C++

  2. Orbit_Courses_FPGA Orbit_Courses_FPGA Public

    An introductory course to FPGA development

    SystemVerilog

  3. TFE4152-8x8-bit-memory-IC TFE4152-8x8-bit-memory-IC Public

    Course project to implement a 8x8 bit memory module. Including designing 1 bit latches with custom transistor spesifications, making the module in system verilog and writing test benches.

    SystemVerilog