ipcore properties fixed

AliceO2Group · Jan 7, 2021 · 96881fb · 96881fb
1 parent 0de9bc1
commit 96881fb
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Showing 5 changed files with 0 additions and 17 deletions.
diff --git a/firmware/FT0/TCM_v1/ipcore_properties/LCLK_PLL.txt b/firmware/FT0/TCM_v1/ipcore_properties/LCLK_PLL.txt
@@ -98,10 +98,6 @@ CONFIG.CLK_OUT6_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_OUT7_PORT                 string  false      clk_out7
 CONFIG.CLK_OUT7_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_VALID_PORT                string  false      CLK_VALID
-CONFIG.CLOCK_CLKFB_IN.INSERT_VIP     string  false      0
-CONFIG.CLOCK_CLKFB_OUT.INSERT_VIP    string  false      0
-CONFIG.CLOCK_CLK_IN1.INSERT_VIP      string  false      0
-CONFIG.CLOCK_CLK_OUT1.INSERT_VIP     string  false      0
 CONFIG.CLOCK_MGR_TYPE                string  false      auto
 CONFIG.Component_Name                string  false      LCLK_PLL
 CONFIG.DADDR_PORT                    string  false      daddr

diff --git a/firmware/FT0/TCM_v1/ipcore_properties/MMCM125ETH.txt b/firmware/FT0/TCM_v1/ipcore_properties/MMCM125ETH.txt
@@ -98,9 +98,6 @@ CONFIG.CLK_OUT6_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_OUT7_PORT                 string  false      clk_out7
 CONFIG.CLK_OUT7_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_VALID_PORT                string  false      CLK_VALID
-CONFIG.CLOCK_CLK_IN1.INSERT_VIP      string  false      0
-CONFIG.CLOCK_CLK_OUT1.INSERT_VIP     string  false      0
-CONFIG.CLOCK_CLK_OUT2.INSERT_VIP     string  false      0
 CONFIG.CLOCK_MGR_TYPE                string  false      auto
 CONFIG.Component_Name                string  false      MMCM125ETH
 CONFIG.DADDR_PORT                    string  false      daddr

diff --git a/firmware/FT0/TCM_v1/ipcore_properties/MMCM320_PH.txt b/firmware/FT0/TCM_v1/ipcore_properties/MMCM320_PH.txt
@@ -98,10 +98,6 @@ CONFIG.CLK_OUT6_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_OUT7_PORT                 string  false      clk_out7
 CONFIG.CLK_OUT7_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_VALID_PORT                string  false      CLK_VALID
-CONFIG.CLOCK_CLK_IN1.INSERT_VIP      string  false      0
-CONFIG.CLOCK_CLK_OUT1.INSERT_VIP     string  false      0
-CONFIG.CLOCK_CLK_OUT2.INSERT_VIP     string  false      0
-CONFIG.CLOCK_CLK_OUT3.INSERT_VIP     string  false      0
 CONFIG.CLOCK_MGR_TYPE                string  false      auto
 CONFIG.Component_Name                string  false      MMCM320_PH
 CONFIG.DADDR_PORT                    string  false      daddr

diff --git a/firmware/FT0/TCM_v1/ipcore_properties/PLL125.txt b/firmware/FT0/TCM_v1/ipcore_properties/PLL125.txt
@@ -98,10 +98,6 @@ CONFIG.CLK_OUT6_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_OUT7_PORT                 string  false      clk_out7
 CONFIG.CLK_OUT7_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_VALID_PORT                string  false      CLK_VALID
-CONFIG.CLOCK_CLK_IN1.INSERT_VIP      string  false      0
-CONFIG.CLOCK_CLK_OUT1.INSERT_VIP     string  false      0
-CONFIG.CLOCK_CLK_OUT2.INSERT_VIP     string  false      0
-CONFIG.CLOCK_CLK_OUT3.INSERT_VIP     string  false      0
 CONFIG.CLOCK_MGR_TYPE                string  false      auto
 CONFIG.Component_Name                string  false      PLL125
 CONFIG.DADDR_PORT                    string  false      daddr

diff --git a/firmware/FT0/TCM_v1/ipcore_properties/xlx_k7v7_gbt_rx_frameclk_phalgnr_mmcm.txt b/firmware/FT0/TCM_v1/ipcore_properties/xlx_k7v7_gbt_rx_frameclk_phalgnr_mmcm.txt
@@ -98,8 +98,6 @@ CONFIG.CLK_OUT6_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_OUT7_PORT                 string  false      clk_out7
 CONFIG.CLK_OUT7_USE_FINE_PS_GUI      string  false      false
 CONFIG.CLK_VALID_PORT                string  false      CLK_VALID
-CONFIG.CLOCK_CLK_IN1.INSERT_VIP      string  false      0
-CONFIG.CLOCK_CLK_OUT1.INSERT_VIP     string  false      0
 CONFIG.CLOCK_MGR_TYPE                string  false      auto
 CONFIG.Component_Name                string  false      xlx_k7v7_gbt_rx_frameclk_phalgnr_mmcm
 CONFIG.DADDR_PORT                    string  false      daddr