4Bit CPU-Simulation-Logisim

Simulation of a 4-bit CPU with Logisim

4-bit CPU by interfacing registers, an ALU and a memory chip incorporating the following features:

1. Implement minimum five instructions namely MOV, ADD, SUB, LOAD, STORE, AND, NOT, OR, RETURN, CALL etc.
2. Two General Purpose Registers (R1 and R2) excluding Special Purpose Registers like PC, PSW.
3. 8 bit address and 4 bit data path
4. Adopted appropriate memory chip to be addressed by 8 bit address decoder
5. Result displayed on 7‐segment displays
6. An ALU to execute above said instructions

Final Design:

Link to Demonstration Video