Skip to content

Commit

Permalink
Merge pull request #801 from xmos/convf32
Browse files Browse the repository at this point in the history
Convf32
  • Loading branch information
panickal-xmos authored Aug 18, 2023
2 parents 1e40e6f + 48957ad commit f32acdb
Show file tree
Hide file tree
Showing 5 changed files with 73 additions and 5 deletions.
41 changes: 41 additions & 0 deletions xformer/IR/XCoreOps.td
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,47 @@ def XC_MulOp : XC_Op<"mul", [Pure]> {
let results = (outs TensorOf<[QI8]> : $output);
}

def XC_Beta_ConvF32Op : XC_Op<"beta_convf32", [Pure]> {
let summary = "Beta ConvF32 op";

let description = [{Beta ConvF32 op.}];

let arguments = (ins
TensorOf<[F32]>:$input,
TensorOf<[F32]>:$kernels,
TensorOf<[F32]>:$bias
);

let results = (outs TensorOf<[F32]> : $output);
}

def XC_Beta_TransposeConvF32Op : XC_Op<"beta_transposeconvf32", [Pure]> {
let summary = "Beta Transpose ConvF32 op";

let description = [{Beta Transpose ConvF32 op.}];

let arguments = (ins
TensorOf<[F32]>:$input,
TensorOf<[F32]>:$kernels,
TensorOf<[F32]>:$bias
);

let results = (outs TensorOf<[F32]> : $output);
}

def XC_Beta_FcF32Op : XC_Op<"beta_fcf32", [Pure]> {
let summary = "Beta Fc F32 op";

let description = [{Beta Fc ConvF32 op.}];

let arguments = (ins
TensorOf<[F32]>:$input,
TensorOf<[F32]>:$kernels
);

let results = (outs TensorOf<[F32]> : $output);
}

def XC_Conv2DV2Op : XC_Op<"conv2d_v2", [Pure]> {
let summary = "Conv2D V2 op";

Expand Down
23 changes: 19 additions & 4 deletions xformer/Transforms/ConvPatterns.td
Original file line number Diff line number Diff line change
Expand Up @@ -25,8 +25,8 @@ def IsConstOp

// TFL_Conv2D() -> XC_FakeConv2D()
def :
Pat<(TFL_Conv2DOp: $output TensorOf<[QI8]>:$input, TensorOf<[QI8]>:$f, AnyTypeOf<[TensorOf<[I32,QI32]>, NoneType]>:$b, $dh, $dw, $faf, $p, $sh, $sw),
(XC_FakeConv2DOp $input, $f, $b, $dh, $dw, $faf, $p, (CreateNoneValue $input), $sh, $sw),[
Pat<(TFL_Conv2DOp: $output TensorOf<[QI8]>:$input, TensorOf<[QI8]>:$f, AnyTypeOf<[TensorOf<[I32,QI32]>, NoneType]>:$b, $dh, $dw, $faf, $wf, $sh, $sw),
(XC_FakeConv2DOp $input, $f, $b, $dh, $dw, $faf, $wf, (CreateNoneValue $input), $sh, $sw),[
(HasMultipleOfNBytesPerPixel<4> $input),
(HasMultipleOfNBytesPerPixel<4> $output),
(HasEqualChannels $input, $f),
Expand All @@ -35,9 +35,24 @@ Pat<(TFL_Conv2DOp: $output TensorOf<[QI8]>:$input, TensorOf<[QI8]>:$f, AnyTypeOf

// TFL_DepthwiseConv2D() -> XC_FakeDepthwiseConv2D()
def :
Pat<(TFL_DepthwiseConv2DOp: $output TensorOf<[QI8]>:$input, TensorOf<[QI8]>:$f, TensorOf<[I32,QI32]>:$b, $dh, $dw, $faf, $p, $sh, $sw, $dm),
(XC_FakeDepthwiseConv2DOp $input, $f, $b, $dh, $dw, $faf, $p, (CreateNoneValue $input), $sh, $sw, $dm),[
Pat<(TFL_DepthwiseConv2DOp: $output TensorOf<[QI8]>:$input, TensorOf<[QI8]>:$f, TensorOf<[I32,QI32]>:$b, $dh, $dw, $faf, $wf, $sh, $sw, $dm),
(XC_FakeDepthwiseConv2DOp $input, $f, $b, $dh, $dw, $faf, $wf, (CreateNoneValue $input), $sh, $sw, $dm),[
(HasMultipleOfNBytesPerPixel<4> $input),
(HasMultipleOfNBytesPerPixel<4> $output),
(IsConstOp $f),
]>;

// F32 TFL_Conv2D() -> XC_Beta_ConvF32()
def :
Pat<(TFL_Conv2DOp: $output TensorOf<[F32]>:$input, TensorOf<[F32]>:$f, TensorOf<[F32]>:$b, $dh, $dw, $faf, $wf, $sh, $sw),
(XC_Beta_ConvF32Op $input, $f, $b)>;

// F32 TFL_TransposeConv2D() -> XC_Beta_TransposeConvF32()
def :
Pat<(TFL_TransposeConvOp: $output $outshape, TensorOf<[F32]>:$f, TensorOf<[F32]>:$input, TensorOf<[F32]>:$b, $wf, $sh, $sw, $faf),
(XC_Beta_TransposeConvF32Op $input, $f, $b)>;

// F32 TFL_FullyConnected() -> XC_Beta_FcF32()
def :
Pat<(TFL_FullyConnectedOp: $output TensorOf<[F32]>:$input, TensorOf<[F32]>:$f, $b, $faf, $wf, $knd, $aqi),
(XC_Beta_FcF32Op $input, $f)>;
8 changes: 8 additions & 0 deletions xformer/Transforms/TranslateToCustomOp.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,11 @@ namespace mlir {
namespace xcore {

std::vector<uint8_t> Bsign8Op::buildCustomOptions() { return {}; }
std::vector<uint8_t> Beta_ConvF32Op::buildCustomOptions() { return {}; }
std::vector<uint8_t> Beta_TransposeConvF32Op::buildCustomOptions() {
return {};
}
std::vector<uint8_t> Beta_FcF32Op::buildCustomOptions() { return {}; }

std::vector<uint8_t> LookupOp::buildCustomOptions() {
flexbuffers::Builder fbb;
Expand Down Expand Up @@ -171,6 +176,9 @@ void TranslateToCustomOp::runOnOperation() {
patterns.insert<RewriteToCustomOp<PadOp>>(ctx);
patterns.insert<RewriteToCustomOp<Pad3To4Op>>(ctx);
patterns.insert<RewriteToCustomOp<StridedSliceOp>>(ctx);
patterns.insert<RewriteToCustomOp<Beta_ConvF32Op>>(ctx);
patterns.insert<RewriteToCustomOp<Beta_TransposeConvF32Op>>(ctx);
patterns.insert<RewriteToCustomOp<Beta_FcF32Op>>(ctx);

(void)applyPatternsAndFoldGreedily(func, std::move(patterns));
}
Expand Down
4 changes: 4 additions & 0 deletions xformer/lib_tflite_micro.BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -36,5 +36,9 @@ filegroup(
"lib_tflite_micro/src/tflite-xcore-kernels/xcore_3_to_4.cc",
"lib_tflite_micro/src/tflite-xcore-kernels/xcore_strided_slice.cc",
"lib_tflite_micro/src/tflite-xcore-kernels/xcore_mul.cc",
"lib_tflite_micro/src/tflite-xcore-kernels/xcore_beta_convf32.cc",
"lib_tflite_micro/src/tflite-xcore-kernels/xcore_beta_transposeconvf32.cc",
"lib_tflite_micro/src/tflite-xcore-kernels/xcore_beta_fcf32.cc",
"lib_tflite_micro/src/tflite-xcore-kernels/conv2d_float.c",
],
)

0 comments on commit f32acdb

Please sign in to comment.