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Add in new SpAcc2
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weiya711 committed Jun 2, 2023
1 parent 9dcbefc commit 0b3f6c8
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Showing 11 changed files with 172 additions and 34 deletions.
7 changes: 4 additions & 3 deletions sam/sim/src/accumulator.py
Original file line number Diff line number Diff line change
Expand Up @@ -301,7 +301,6 @@ def update(self):
# self.stkndrop_val = StknDrop(fifos=[fsd3], **self.kwargs)
pass


# Set when block counts should start
if len(self.in_crd1) > 0 or len(self.in_crd0) > 0 or len(self.in_val) > 0:
self.block_start = False
Expand Down Expand Up @@ -472,6 +471,7 @@ def __init__(self, maxdim=100, valtype=float, last_level=True, val_stkn=False, d
self.fifo_avail_1 = True
self.fifo_avail_0 = True
self.fifo_avail_val = True

def check_backpressure(self):
if self.backpressure_en:
copy_backpressure = self.ready_backpressure
Expand Down Expand Up @@ -513,7 +513,8 @@ def print_debug(self):
print("========== " + self.name + " SPACC2 (NEW) ==========")
print("Inputs: ", self.in_crd2, self.in_crd1, self.in_crd0, self.in_val)
print("Temps: ", self.curr_crd2, self.crd2_stkn, self.curr_in_crd1, self.curr_in_crd0, self.curr_in_val)
print("Store/Wr: ", self.storage, self.writeout_storage1, self.writeout_storage0, self.writeout1, self.writeout0)
print("Store/Wr: ", self.storage, self.writeout_storage1, self.writeout_storage0, self.writeout1,
self.writeout0)
print("Outputs: ", self.curr_crd1, self.curr_crd0, self.curr_val)
print("State: ", self.curr_state, self.next_state)

Expand All @@ -523,7 +524,6 @@ def get_writout(self):
def build_writeout(self):
result = []
for crd1 in sorted(self.storage.keys()):
print("storage:", self.storage[crd1])
for crd0, val in self.storage[crd1].items():
result.append((crd0, val))
result.append(('S0', 'S0'))
Expand Down Expand Up @@ -756,6 +756,7 @@ def set_val(self, val, parent=None):
def out_crd1(self):
if (self.backpressure_en and self.data_valid) or not self.backpressure_en:
return self.curr_crd1

def out_crd0(self):
if (self.backpressure_en and self.data_valid) or not self.backpressure_en:
return self.curr_crd0
Expand Down
7 changes: 4 additions & 3 deletions sam/sim/src/accumulator_helpers.py
Original file line number Diff line number Diff line change
Expand Up @@ -150,7 +150,8 @@ def update(self):

if self.val_stkn:
self.curr_val = self.crdpt_spacc_out_val.pop(0) if isinstance(self.curr_inner_crd, int) and \
len(self.crdpt_spacc_out_val) > 0 else self.curr_inner_crd
len(self.crdpt_spacc_out_val) > 0 else \
self.curr_inner_crd
else:
self.curr_val = self.crdpt_spacc_out_val.pop(0) if len(self.crdpt_spacc_out_val) > 0 else ''

Expand Down Expand Up @@ -520,7 +521,8 @@ def update(self):
# If a done token is seen, cannot emit done until all coordinates have been written out
elif self.curr_in_outer_crdpt == 'D':
assert self.curr_in_inner_crdpt == 'D' and self.curr_in_val == 'D', \
"If one item is a 'D' token, then all inputs must be"
"If one item is a 'D' token, then all inputs must be: " + str(self.curr_in_inner_crdpt) + ", " + \
str(self.curr_in_val)
self.seen_done = True
else:
self.storage[self.curr_in_outer_crdpt] = {self.curr_in_inner_crdpt: self.valtype(self.curr_in_val)}
Expand All @@ -529,7 +531,6 @@ def update(self):
fiber = self.emit_output[0]

self.curr_outer_crdpt = fiber[0]
print(self.storage)
self.curr_inner_crdpt = min(
[item for item in self.storage[self.curr_outer_crdpt].keys() if item > fiber[1]])
self.curr_val = self.storage[self.curr_outer_crdpt][self.curr_inner_crdpt]
Expand Down
4 changes: 2 additions & 2 deletions sam/sim/src/bitvector.py
Original file line number Diff line number Diff line change
Expand Up @@ -383,11 +383,11 @@ def update(self):
if len(self.inner_bv) > 0:
ibv = self.inner_bv.pop(0)
self.bv_drop.set_inner_bv(ibv)
self.inner_stkn_drop.set_in_stream(ibv)
self.inner_stkn_drop.set_in_val(ibv)

self.bv_drop.update()

self.outer_stkn_drop.set_in_stream(self.bv_drop.out_bv_outer())
self.outer_stkn_drop.set_in_val(self.bv_drop.out_bv_outer())
self.outer_stkn_drop.update()

self.inner_stkn_drop.update()
Expand Down
1 change: 1 addition & 0 deletions sam/sim/test/conftest.py
Original file line number Diff line number Diff line change
Expand Up @@ -159,3 +159,4 @@ def f(func, extra_info=None, save_ret_val=False):
benchmark.pedantic(func, rounds=1, iterations=1, warmup_rounds=0)

return f

2 changes: 1 addition & 1 deletion sam/sim/test/primitives/test_empty_stkn_drop.py
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ def test_empty_stkn_drop(arrs, debug_sim):
out = []
while not done and time < TIMEOUT:
if len(ival) > 0:
td.set_in_stream(ival.pop(0))
td.set_in_val(ival.pop(0))

td.update()

Expand Down
3 changes: 3 additions & 0 deletions sam/sim/test/primitives/test_memory_block.py
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
import csv
import pickle
import yaml

cwd = os.getcwd()
formatted_dir = os.getenv('TILED_SUITESPARSE_FORMATTED_PATH', default=os.path.join(cwd, 'mode-formats'))
sam_home = os.getenv('SAM_HOME')
Expand All @@ -30,6 +31,7 @@
"out_crd": [28, 'S1', 'S1', 28, 'S1', 'D'], "out_ref": [0, 'S1', 'S1', 0, 'S1', 'D']}


@pytest.mark.skipif(sam_home is None, reason="Skipping because SAM_HOME not set")
@pytest.mark.parametrize("arrs", [arr_dict1, arr_dict2, arr_dict3, arr_dict4, arr_dict5])
def test_memory_block_nbuffer(arrs, debug_sim, skip_empty, yaml_name, report_stats, nbuffer):
nbuffer = True
Expand Down Expand Up @@ -98,6 +100,7 @@ def test_memory_block_nbuffer(arrs, debug_sim, skip_empty, yaml_name, report_sta
assert out_gold == out


@pytest.mark.skipif(sam_home is None, reason="Skipping because SAM_HOME not set")
@pytest.mark.parametrize("arrs", [arr_dict1, arr_dict2, arr_dict3, arr_dict4, arr_dict5])
def test_memory_block(arrs, debug_sim, skip_empty, yaml_name, report_stats, nbuffer):
nbuffer = False
Expand Down
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