DCLab

Digital Circuits Lab (2017 Spring)

Requirements

• Quartus 16
• DE2-115 FPGA board

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Digital Circuits Lab

Lab 1

Pseudo-random number generator on FPGA

Lab2

RSA decoder on FPGA, using Python for serial data trasmission on RS-232 interface

Lab3

Audio recorder on FPGA using SDRAM, more details in report (Chinese)

Final Project

A NIOS-II system that can load 3D models from SD card and render them on the screen in real time, link: https://github.com/victoresque/FPGA-Renderer

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數位電路實驗

實驗一

在 DE2-115 上實作亂數產生器

實驗二

實作 RSA 解碼器，利用 RS-232 介面和 Python 進行資料傳輸

實驗三

實作簡單的錄音機，細節請參考 Report

期末專題

基於 NIOS-II 的實時 3D 渲染。 https://github.com/victoresque/FPGA-Renderer