Merge pull request #1320 from gregoral/riscv_new_h_and_q_instructions

RISC-V: Instructions from H and Q extensions

src/Arch/RiscV/Mnemonic.cs

@@ -110,63 +110,85 @@ public enum Mnemonic
         ebreak,
         ecall,
         fabs_d,
+        fabs_h,
         fabs_q,
         fabs_s,
         fadd_d,
+        fadd_h,
         fadd_q,
         fadd_s,
         fclass_d,
+        fclass_h,
         fclass_q,
         fclass_s,
+        fcvt_d_h,
         fcvt_d_l,
         fcvt_d_lu,
         fcvt_d_q,
         fcvt_d_s,
         fcvt_d_w,
         fcvt_d_wu,
+        fcvt_h_d,
+        fcvt_h_l,
+        fcvt_h_lu,
+        fcvt_h_q,
+        fcvt_h_s,
+        fcvt_h_w,
+        fcvt_h_wu,
         fcvt_l_d,
+        fcvt_l_h,
         fcvt_l_q,
         fcvt_l_s,
         fcvt_lu_d,
+        fcvt_lu_h,
         fcvt_lu_q,
         fcvt_lu_s,
         fcvt_q_d,
+        fcvt_q_h,
         fcvt_q_l,
         fcvt_q_lu,
         fcvt_q_s,
         fcvt_q_w,
         fcvt_q_wu,
         fcvt_s_d,
+        fcvt_s_h,
         fcvt_s_l,
         fcvt_s_lu,
         fcvt_s_q,
         fcvt_s_w,
         fcvt_s_wu,
         fcvt_w_d,
+        fcvt_w_h,
         fcvt_w_q,
         fcvt_w_s,
         fcvt_wu_d,
+        fcvt_wu_h,
         fcvt_wu_q,
         fcvt_wu_s,
         fdiv_d,
+        fdiv_h,
         fdiv_q,
         fdiv_s,
         fence,
         fence_i,
         fence_tso,
         feq_d,
+        feq_h,
         feq_q,
         feq_s,
         fld,
         fle_d,
+        fle_h,
         fle_q,
         fle_s,
+        flh,
         fli_d,
         fli_h,
         fli_q,
         fli_s,
         flq,
         flt_d,
+        flt_h,
         flt_q,
         flt_s,
         flw,
@@ -195,17 +217,23 @@ public enum Mnemonic
         fmsub_q,
         fmsub_s,
         fmul_d,
+        fmul_h,
         fmul_q,
         fmul_s,
         fmv_d,
         fmv_d_x,
+        fmv_h,
+        fmv_h_x,
         fmv_q,
+        // fmv_q_x, //$TODO: this will be part of RV128
         fmv_s,
-        fmv_s_x,
         fmv_w_x,
         fmv_x_d,
+        fmv_x_h,
+        // fmv_x_q, //$TODO: this will be part of RV128
         fmv_x_w,
         fneg_d,
+        fneg_h,
         fneg_q,
         fneg_s,
         fnmadd_d,
@@ -216,23 +244,60 @@ public enum Mnemonic
         fnmsub_h,
         fnmsub_q,
         fnmsub_s,
+        fround_d,
+        fround_h,
+        fround_q,
+        fround_s,
+        froundnx_d,
+        froundnx_h,
+        froundnx_q,
+        froundnx_s,
         fsd,
         fsgnj_d,
+        fsgnj_h,
         fsgnj_q,
         fsgnj_s,
         fsgnjn_d,
+        fsgnjn_h,
         fsgnjn_q,
         fsgnjn_s,
         fsgnjx_d,
+        fsgnjx_h,
         fsgnjx_q,
         fsgnjx_s,
+        fsh,
+        fsq,
         fsqrt_d,
+        fsqrt_h,
         fsqrt_q,
         fsqrt_s,
         fsub_d,
+        fsub_h,
         fsub_q,
         fsub_s,
         fsw,
+        hfence_gvma,
+        hfence_vvma,
+        hinval_gvma,
+        hinval_vvma,
+        hlv_b,
+        hlv_bu,
+        hlv_d,
+        hlv_w,
+        hlv_wu,
+        hlv_du,
+        hlv_h,
+        hlv_hu,
+        hlvx_h,
+        hlvx_hu,
+        hlvx_wu,
+        hsv_b,
+        hsv_bu,
+        hsv_d,
+        hsv_du,
+        hsv_h,
+        hsv_hu,
+        hsv_w,
         jal,
         jalr,
         lb,
@@ -241,6 +306,8 @@ public enum Mnemonic
         lh,
         lhu,
         lr_d,
+        lr_h,
+        lr_q,
         lr_w,
         lui,
         lw,
@@ -260,9 +327,16 @@ public enum Mnemonic
         remw,
         sb,
         sc_d,
+        sc_h,
         sc_w,
         sd,
+        sfence_inval,
+        sfence_inval_ir,
+        sfence_vm,
+        sfence_vma,
+        sfence_w_inval,
         sh,
+        sinval_vma,
         sll,
         slli,
         slliw,
@@ -287,36 +361,5 @@ public enum Mnemonic
         wfi,
         xor,
         xori,
-        sfence_vma,
-        sfence_inval,
-        sfence_w_inval,
-        sfence_inval_ir,
-        hfence_vvma,
-        hinval_vvma,
-        hfence_gvma,
-        hinval_gvma,
-
-        hlv_b,
-        hlv_bu,
-        hlv_h,
-        hlv_hu,
-        hlvx_hu,
-        hlv_w,
-        hlvx_wu,
-        hsv_b,
-        hsv_h,
-        hsv_w,
-        hsv_d,
-        hlv_wu,
-        hlv_d,
-        fround_s,
-        froundnx_s,
-        fround_d,
-        froundnx_d,
-        fcvt_h_s,
-        fround_h,
-        froundnx_h,
-        froundnx_q,
-        fround_q,
     }
 }

src/Arch/RiscV/RiscVRewriter.Alu.cs

@@ -139,6 +139,32 @@ private void RewriteCompressedBinOp(Func<Expression,Expression,Expression> op, P
             MaybeSliceSignExtend(dst, val, dtDst);
         }
 
+        private Expression RewriteEffectiveAddress()
+        {
+            Expression ea;
+            if (instr.Operands[1] is MemoryOperand mem)
+            {
+                var baseReg = binder.EnsureRegister(mem.Base);
+                ea = baseReg;
+                if (mem.Offset != 0)
+                {
+                    ea = m.IAddS(ea, mem.Offset);
+                }
+            }
+            else
+            {
+                var baseReg = RewriteOp(1);
+                var offset = ((ImmediateOperand) instr.Operands[2]).Value;
+                ea = baseReg;
+                if (!offset.IsZero)
+                {
+                    ea = m.IAdd(ea, offset);
+                }
+            }
+
+            return ea;
+        }
+
         private void RewriteLi()
         {
             var src = RewriteOp(1);

src/Arch/RiscV/RiscVRewriter.Fpu.cs

@@ -156,6 +156,12 @@ private void RewriteFGenericBinaryIntrinsic(PrimitiveType dt, IntrinsicProcedure
             m.Assign(dst, MaybeNanBox(m.Fn(fn.MakeInstance(dt), src1, src2), dst.DataType));
         }
 
+        private void RewriteFGenericUnaryIntrinsic(PrimitiveType dt, IntrinsicProcedure fn)
+        {
+            var src1 = MaybeSlice(RewriteOp(1), dt);
+            var dst = RewriteOp(0);
+            m.Assign(dst, MaybeNanBox(m.Fn(fn.MakeInstance(dt), src1), dst.DataType));
+        }
 
         private void RewriteFUnaryIntrinsic(PrimitiveType dt, IntrinsicProcedure fn)
         {
@@ -164,7 +170,6 @@ private void RewriteFUnaryIntrinsic(PrimitiveType dt, IntrinsicProcedure fn)
             m.Assign(dst, MaybeNanBox(m.Fn(fn, src), dst.DataType));
         }
 
-
         // Move bits between integer and FP regs without interpretation.
         private void RewriteFMove(PrimitiveType dtFrom, PrimitiveType dtTo)
         {