Bump toolchains/riscv-tools/riscv-isa-sim from 824ecdf to 4156e07
#2123
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Bumps [toolchains/riscv-tools/riscv-isa-sim](https://github.com/riscv-software-src/riscv-isa-sim) from `824ecdf` to `4156e07`. - [Release notes](https://github.com/riscv-software-src/riscv-isa-sim/releases) - [Commits](riscv-software-src/riscv-isa-sim@824ecdf...4156e07) --- updated-dependencies: - dependency-name: toolchains/riscv-tools/riscv-isa-sim dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
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Superseded by #2131. |
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Bumps toolchains/riscv-tools/riscv-isa-sim from
824ecdfto4156e07.Commits
4156e07Merge pull request #1853 from arrv-sc/masteradafbd3feat: add possibility for custom CSRsfd0a927Merge pull request #1848 from riscv-software-src/fix-18461adf60fFix FCSR accesses under Zfinxce71e75Remove require_fs macro, as it is only used oncef0d4d42Merge pull request #1830 from demin-han/master2688d17Fix non-standard interrupt start position88fc84dMerge pull request #1839 from ved-rivos/issue_18388566627add missing sdt/sie interaction when writing mstatus directlyfa694e2Merge pull request #1835 from joe-rivos/fix-ignored-attributes-warningDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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