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HBridge Branch #93

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merged 40 commits into from
Dec 13, 2024
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58d0432
Init Resync FPGA image
Sep 24, 2024
ed6f101
Init resync rp-lib
Sep 24, 2024
d820174
Init resync server
Sep 24, 2024
268702b
Init resync julia client
Sep 24, 2024
7b8d04e
Fix variable name in seq_data_int
Sep 24, 2024
0457f85
Init working resync based on aresetn
Sep 25, 2024
45d19c1
fix multi-channel resync issues
tknopp Sep 26, 2024
cdb0ae9
Move resync flag to bit 14 of each DAC channel
Sep 26, 2024
823c37e
Restrict getSequenceResyncValue to DAC channel
Sep 26, 2024
b79123c
Init test of step counting with writepointer lowest bit
Nov 29, 2024
3bada95
add sequenceIssue.jl
tknopp Dec 1, 2024
f1130c4
fix sequence stepper issue
tknopp Dec 1, 2024
d5e364e
first version of hbridge
tknopp Dec 6, 2024
3f5d761
some fix remaining issues in BD
tknopp Dec 6, 2024
7d28e35
update bd
tknopp Dec 6, 2024
691afb9
server changes for hbridge
tknopp Dec 6, 2024
7b15284
change version to 10
tknopp Dec 6, 2024
0828b19
Init Resync FPGA image
Sep 24, 2024
49de96b
Init resync rp-lib
Sep 24, 2024
4863598
Init resync server
Sep 24, 2024
e2685b2
Init resync julia client
Sep 24, 2024
b78f39d
Fix variable name in seq_data_int
Sep 24, 2024
06353ea
Init working resync based on aresetn
Sep 25, 2024
a2c0901
fix multi-channel resync issues
tknopp Sep 26, 2024
14ab693
Move resync flag to bit 14 of each DAC channel
Sep 26, 2024
5d4f42d
Restrict getSequenceResyncValue to DAC channel
Sep 26, 2024
3c62792
Init test of step counting with writepointer lowest bit
Nov 29, 2024
b7a8259
add sequenceIssue.jl
tknopp Dec 1, 2024
731826b
fix sequence stepper issue
tknopp Dec 1, 2024
cc911a9
first version of hbridge
tknopp Dec 6, 2024
c2088de
some fix remaining issues in BD
tknopp Dec 6, 2024
1503123
update bd
tknopp Dec 6, 2024
03b5511
server changes for hbridge
tknopp Dec 6, 2024
8d4f9eb
change version to 10
tknopp Dec 6, 2024
fa4ceb3
Merge branch 'tk/hbridge' of https://github.com/tknopp/RedPitayaDAQSe…
tknopp Dec 9, 2024
3f89cc1
fix issue with sequence stepper
Dec 9, 2024
5b56591
fix sequence stepper issue
tknopp Dec 9, 2024
2a8da4a
Merge branch 'tk/hbridge' of https://github.com/tknopp/RedPitayaDAQSe…
tknopp Dec 9, 2024
cefe237
Add resync example and docs
nHackel Dec 13, 2024
34a932c
Update Julia version to match 0.10 FPGA image
nHackel Dec 13, 2024
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3 changes: 2 additions & 1 deletion docs/make.jl
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,8 @@ makedocs(
"Sequence Ramping" => "examples/seqRamping.md",
"Cluster" => "examples/cluster.md",
"Batch" => "examples/batch.md",
"Continous Signal Acquisition" => "examples/producerConsumer.md"],
"Continous Signal Acquisition" => "examples/producerConsumer.md",
"Resync" => "examples/resync.md",],
"FPGA Development" => "fpga.md",
"Development Tips" => "devtips.md",
#"Getting Started" => "overview.md",
Expand Down
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21 changes: 21 additions & 0 deletions docs/src/examples/resync.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
# Resync Example

In this example we add a resync signal to a [sequence](sequence.md) to create a signal that resynchronizes phase and frequency of the DACs after every frame. This can be used to change the frequency and phase of a signal during measurement. While the resynchronization is synchronous due to the sequences, the actual new frequency and phase information is asynchronous as they are transmitted via SCPI.

The example constructs a sequence with no offset and the very last step has the resync flag enabled. Note that during the resync-step the DAC outputs zero.

## Julia Client

This and all other examples are located in the ```examples``` [directory](https://github.com/tknopp/RedPitayaDAQServer/tree/master/src/examples/julia)

````@eval
# Adapted from https://github.com/JuliaDocs/Documenter.jl/issues/499
using Markdown
Markdown.parse("""
```julia
$(open(f->read(f, String), "../../../src/examples/julia/resync.jl"))
```
""")
````

![Resync Example Results](../assets/resync.png)
2 changes: 1 addition & 1 deletion docs/src/generation.md
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@ As the LUT used by the FPGA image is small in comparison with the main memory an

Comparable to the sample transmission of the acquisition, this updating of the LUT is also a process with timing uncertainty as it is affected by the scheduling and execution of the RedPitayas CPU. While during the sample transmission samples could be lost because they were overwritten, in the signal generation wrong signals could be output because the server was too slow in updating the values. Here, the server tracks similar performance metrics and also features a status flag `lostSteps` for exactly this case. In its current implementation a safe step rate is at 12 kHz.

Sequences and their steps also have additional features. A step can be marked such that during its duration the signal is set to 0. Furthermore, a step can be marked such that it triggers the ramp down. To make this easier to manage the server actually manages three sequences, that can be set individually: A ramp up, regular and ramp down sequence. The ramp up sequence is moved to the FPGA LUT at the acquisition start, followed by the regular sequence. Afterwards the ramp down sequence is started and during its execution the ramp down flag is set.
Sequences and their steps also have additional features. A step can be marked such that during its duration the signal is set to 0. Furthermore, a step can be marked such that it triggers the ramp down. To make this easier to manage the server actually manages three sequences, that can be set individually: A ramp up, regular and ramp down sequence. The ramp up sequence is moved to the FPGA LUT at the acquisition start, followed by the regular sequence. Afterwards the ramp down sequence is started and during its execution the ramp down flag is set. Steps can also be marked to resync the fast DACs. During a resync, the signals are set to 0 and afterwards start again with their set phase and frequency. This can be used to change frequency and phase during measurements and s.t. the new phase and frequency is synchronous to the steps.

## Calibration
Similar to the signal acquisition, there are also calibration scale ``c_{i, scale}`` and offset ``c_{i, offset}`` values for the signal generation. These are stored in the EEPROM of the RedPitaya and can be updated by a client. The calibration values are always applied, even when the master trigger is off.
Expand Down
1 change: 1 addition & 0 deletions docs/src/scpi.md
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,7 @@ During an active trigger the buffer is periodically updated by the server. If th
| RP:DAC:SEQ:CHan? | | Return the number of sequence channel | | |
| RP:DAC:SEQ:LUT | steps, repetitions | Instruct the server to receive a LUT over the data socket | C | RP:DAC:SEQ:LUT 10,2 |
| RP:DAC:SEQ:LUT:ENaBle | | Instruct the server to receive an enable LUT over the data socket of the same shape as the regular LUT| C | |
| RP:DAC:SEQ:LUT:ReSYNC | | Instruct the server to receive a resync LUT over the data socket of the same shape as the regular LUT| C | |
| RP:DAC:SEQ:LUT:UP | steps, repetitions | Instruct the server to receive a ramp up LUT over the data socket | C | |
| RP:DAC:SEQ:LUT:DOWN | steps, repetitions | Instruct the server to receive a ramp down LUT over the data socket | C | |
| RP:DAC:SEQ:CLEAR | | Clear the set sequence values from the FPGA buffer | C | |
Expand Down
2 changes: 1 addition & 1 deletion src/client/julia/Project.toml
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
name = "RedPitayaDAQServer"
uuid = "c544963a-496b-56d4-a5fe-f99a3f174c8f"
authors = ["Tobias Knopp <[email protected]>"]
version = "0.8.2"
version = "0.10.0"

[deps]
LinearAlgebra = "37e2e46d-f89d-539d-b4ee-838fcccc9c8e"
Expand Down
64 changes: 47 additions & 17 deletions src/client/julia/src/Sequence.jl
Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,8 @@ Struct representing a sequence in which the server directly takes the values fro
"""
struct SimpleSequence <: AbstractSequence
lut::SequenceLUT
enable::Union{Array{Bool}, Nothing}
enable::Union{Matrix{Bool}, Nothing}
resync::Union{Matrix{Bool}, Nothing}
"""
SimpleSequence(lut, repetitions, enable=nothing)

Expand All @@ -114,17 +115,18 @@ struct SimpleSequence <: AbstractSequence
- `repetitions::Int32`: the number of times the sequence should be repeated
- `emable::Union{Array{Bool}, Nothing}`: matrix containing enable flags
"""
function SimpleSequence(lut::Array{Float32}, repetitions::Integer, enable::Union{Array{Bool}, Nothing}=nothing)
function SimpleSequence(lut::Matrix{Float32}, repetitions::Integer, enable::Union{Matrix{Bool}, Nothing}=nothing, resync::Union{Matrix{Bool}, Nothing} = nothing)
if !isnothing(enable) && size(lut) != size(enable)
throw(DimensionMismatch("Size of enable LUT does not match size of value LUT"))
end
return new(SequenceLUT(lut, repetitions), enable)
return new(SequenceLUT(lut, repetitions), enable, resync)
end
end
SimpleSequence(lut::Array{T}, repetitions::Integer, enable::Union{Array{Bool}, Nothing}=nothing) where T <: Real = SimpleSequence(map(Float32, lut), repetitions, enable)
SimpleSequence(lut::Vector{T}, repetitions::Integer, enable::Union{Array{Bool}, Nothing}=nothing) where T <: Real = SimpleSequence(reshape(lut, 1, :), repetitions, enable)
SimpleSequence(lut::Array{T}, repetitions::Integer, args...) where T <: Real = SimpleSequence(map(Float32, lut), repetitions, args...)
SimpleSequence(lut::Vector{T}, repetitions::Integer, args...) where T <: Real = SimpleSequence(reshape(lut, 1, :), repetitions, args...)

enableLUT(seq::SimpleSequence) = seq.enable
resyncLUT(seq::SimpleSequence) = seq.resync
valueLUT(seq::SimpleSequence) = seq.lut
rampUpLUT(seq::SimpleSequence) = nothing
rampDownLUT(seq::SimpleSequence) = nothing
Expand All @@ -134,17 +136,19 @@ abstract type RampingSequence <: AbstractSequence end
struct SimpleRampingSequence <: AbstractSequence
lut::SequenceLUT
enable::Union{Array{Bool}, Nothing}
resync::Union{Array{Bool}, Nothing}
rampUp::SequenceLUT
rampDown::SequenceLUT
function SimpleRampingSequencee(lut::SequenceLUT, up::SequenceLUT, down::SequenceLUT, enable::Union{Array{Bool}, Nothing}=nothing)
function SimpleRampingSequencee(lut::SequenceLUT, up::SequenceLUT, down::SequenceLUT, enable::Union{Array{Bool}, Nothing}=nothing, resync::Union{Array{Bool}, Nothing}=nothing)
if !isnothing(enable) && size(values(lut)) != size(enable)
throw(DimensionMismatch("Size of enable LUT does not match size of value LUT"))
end
return new(SequenceLUT(lut, repetitions), enable, up, down)
return new(SequenceLUT(lut, repetitions), enable, resync, up, down)
end
end

enableLUT(seq::SimpleRampingSequence) = seq.enable
resyncLUT(seq::SimpleRampingSequence) = seq.resync
valueLUT(seq::SimpleRampingSequence) = seq.lut
rampUpLUT(seq::SimpleRampingSequence) = nothing
rampDownLUT(seq::SimpleRampingSequence) = nothing
Expand All @@ -158,6 +162,7 @@ end
struct HoldBorderRampingSequence <: RampingSequence
lut::SequenceLUT
enable::Union{Array{Bool}, Nothing}
resync::Union{Array{Bool}, Nothing}
rampUp::SequenceLUT
rampDown::SequenceLUT

Expand All @@ -170,13 +175,13 @@ struct HoldBorderRampingSequence <: RampingSequence
- `lut`,`repetitions`,`enable` are used the same as for a `SimpleSequence`
- `rampingSteps` is the number of steps the first and last value of the given sequence are repeated before the sequence is started
"""
function HoldBorderRampingSequence(lut::Array{Float32}, repetitions::Integer, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing)
function HoldBorderRampingSequence(lut::Array{Float32}, repetitions::Integer, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing, resync::Union{Array{Bool}, Nothing}=nothing)
if !isnothing(enable) && size(lut) != size(enable)
throw(DimensionMismatch("Size of enable LUT does not match size of value LUT"))
end
up = SequenceLUT(lut[:, 1], rampingSteps)
down = SequenceLUT(lut[:, end], rampingSteps)
return new(SequenceLUT(lut, repetitions), enable, up, down)
return new(SequenceLUT(lut, repetitions), enable, resync, up, down)
end
end

Expand All @@ -190,38 +195,42 @@ function HoldBorderRampingSequence(rp::RedPitaya, lut, repetitions, enable=nothi
end

enableLUT(seq::HoldBorderRampingSequence) = seq.enable
resyncLUT(seq::HoldBorderRampingSequence) = seq.resync
valueLUT(seq::HoldBorderRampingSequence) = seq.lut
rampUpLUT(seq::HoldBorderRampingSequence) = seq.rampUp
rampDownLUT(seq::HoldBorderRampingSequence) = seq.rampDown

struct ConstantRampingSequence <: RampingSequence
lut::SequenceLUT
enable::Union{Array{Bool}, Nothing}
resync::Union{Array{Bool}, Nothing}
ramping::SequenceLUT

function ConstantRampingSequence(lut::Array{Float32}, repetitions::Integer, rampingValue::Float32, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing)
function ConstantRampingSequence(lut::Array{Float32}, repetitions::Integer, rampingValue::Float32, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing, resync::Union{Array{Bool}, Nothing}=nothing)
if !isnothing(enable) && size(lut) != size(enable)
throw(DimensionMismatch("Size of enable LUT does not match size of value LUT"))
end
rampingLut = SequenceLUT([rampingValue for i = 1:size(lut, 1)], rampingSteps)
return new(SequenceLUT(lut, repetitions), enable, rampingLut)
return new(SequenceLUT(lut, repetitions), enable, resync, rampingLut)
end
end
ConstantRampingSequence(lut::Array{T}, repetitions::Integer, rampingValue::Real, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing) where T <: Real = ConstantRampingSequence(map(Float32, lut), repetitions, Float32(rampingValue), rampingSteps, enable)
ConstantRampingSequence(lut::Vector{Float32}, repetitions::Integer, rampingValue::Float32, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing) = ConstantRampingSequence(reshape(lut, 1, :), repetitions, rampingValue, rampingSteps, enable)
ConstantRampingSequence(lut::Vector{T}, repetitions::Integer, rampingValue::Real, rampingSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing) where T <: Real = ConstantRampingSequence(reshape(lut, 1, :), repetitions, rampingValue, rampingSteps, enable)

enableLUT(seq::ConstantRampingSequence) = seq.enable
resyncLUT(seq::ConstantRampingSequence) = seq.resync
valueLUT(seq::ConstantRampingSequence) = seq.lut
rampUpLUT(seq::ConstantRampingSequence) = seq.ramping
rampDownLUT(seq::ConstantRampingSequence) = seq.ramping

struct StartUpSequence <: RampingSequence
lut::SequenceLUT
enable::Union{Array{Bool}, Nothing}
resync::Union{Array{Bool}, Nothing}
rampUp::SequenceLUT
rampDown::SequenceLUT
function StartUpSequence(lut::Array{Float32}, repetitions::Integer, rampingSteps::Integer, startUpSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing)
function StartUpSequence(lut::Array{Float32}, repetitions::Integer, rampingSteps::Integer, startUpSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing, resync::Union{Array{Bool}, Nothing}=nothing)
if !isnothing(enable) && size(lut) != size(enable)
throw(DimensionMismatch("Size of enable LUT does not match size of value LUT"))
end
Expand All @@ -239,14 +248,15 @@ struct StartUpSequence <: RampingSequence
end
up = SequenceLUT(upLut, 1)
down = SequenceLUT(lut[:, end], rampingSteps)
return new(SequenceLUT(lut, repetitions), enable, up, down)
return new(SequenceLUT(lut, repetitions), enable, resync, up, down)
end
end
StartUpSequence(lut::Array{T}, repetitions::Integer, rampingSteps::Integer, startUpSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing) where T <: Real = StartUpSequence(map(Float32, lut), repetitions, rampingSteps, startUpSteps, enable)
#StartUpSequence(lut::Vector{Float32}, repetitions::Integer, rampingSteps::Integer, startUpSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing) = StartUpSequence(reshape(lut, 1, :), repetitions, rampingSteps, startUpSteps, enable)
StartUpSequence(lut::Vector{T}, repetitions::Integer, rampingSteps::Integer, startUpSteps::Integer, enable::Union{Array{Bool}, Nothing}=nothing) where T <: Real = StartUpSequence(reshape(lut, 1, :), repetitions, rampingSteps, startUpSteps, enable)

enableLUT(seq::StartUpSequence) = seq.enable
resyncLUT(seq::StartUpSequence) = seq.resync
valueLUT(seq::StartUpSequence) = seq.lut
rampUpLUT(seq::StartUpSequence) = seq.rampUp
rampDownLUT(seq::StartUpSequence) = seq.rampDown
Expand All @@ -269,10 +279,11 @@ Transmit the client-side representation `seq` to the server and append it to the
"""
function sequence!(rp::RedPitaya, seq::AbstractSequence)
result = true
result &= valueLUT!(rp, valueLUT(seq))
result &= enableLUT!(rp, enableLUT(seq))
result &= rampUpLUT!(rp, rampUpLUT(seq))
result &= rampDownLUT!(rp, rampDownLUT(seq))
result &= valueLUT!(rp, seq)
result &= enableLUT!(rp, seq)
result &= resyncLUT!(rp, seq)
result &= rampUpLUT!(rp, seq)
result &= rampDownLUT!(rp, seq)
result &= setSequence!(rp)
return result
end
Expand All @@ -283,11 +294,13 @@ function transmitLUT!(rp::RedPitaya, lut::Array{Float32}, cmd::String, repetitio
return parse(Bool, receive(rp))
end

valueLUT!(rp::RedPitaya, lut::AbstractSequence) = valueLUT!(rp, valueLUT(lut))
function valueLUT!(rp::RedPitaya, lut::SequenceLUT)
lutFloat32 = map(Float32, values(lut))
return transmitLUT!(rp, lutFloat32, "RP:DAC:SEQ:LUT", repetitions(lut))
end

rampUpLUT!(rp::RedPitaya, lut::AbstractSequence) = rampUpLUT!(rp, rampUpLUT(lut))
function rampUpLUT!(rp::RedPitaya, lut::SequenceLUT)
lutFloat32 = map(Float32, values(lut))
return transmitLUT!(rp, lutFloat32, "RP:DAC:SEQ:LUT:UP", repetitions(lut))
Expand All @@ -298,6 +311,7 @@ function rampUpLUT!(rp::RedPitaya, lut::Nothing)
return true
end

rampDownLUT!(rp::RedPitaya, lut::AbstractSequence) = rampDownLUT!(rp, rampDownLUT(lut))
function rampDownLUT!(rp::RedPitaya, lut::SequenceLUT)
lutFloat32 = map(Float32, values(lut))
return transmitLUT!(rp, lutFloat32, "RP:DAC:SEQ:LUT:DOWN", repetitions(lut))
Expand All @@ -308,6 +322,7 @@ function rampDownLUT!(rp::RedPitaya, lut::Nothing)
return true
end

enableLUT!(rp::RedPitaya, lut::AbstractSequence) = enableLUT!(rp, enableLUT(lut))
function enableLUT!(rp::RedPitaya, lut::Array)
lutBool = map(Bool, lut)
send(rp, string("RP:DAC:SEQ:LUT:ENaBle"))
Expand All @@ -322,6 +337,21 @@ function enableLUT!(rp::RedPitaya, lut::Nothing)
return true
end

resyncLUT!(rp::RedPitaya, lut::AbstractSequence) = resyncLUT!(rp, resyncLUT(lut))
function resyncLUT!(rp::RedPitaya, lut::Array)
lutBool = map(Bool, lut)
send(rp, string("RP:DAC:SEQ:LUT:ReSYNC"))
@debug "Writing resync DAC LUT"
write(rp.dataSocket, lutBool)
reply = receive(rp)
return parse(Bool, reply)
end

function resyncLUT!(rp::RedPitaya, lut::Nothing)
# NOP
return true
end

function seqTiming(seq::AbstractSequence)
up = 0
if !isnothing(rampUpLUT(seq))
Expand Down
40 changes: 40 additions & 0 deletions src/client/julia/src/SlowIO.jl
Original file line number Diff line number Diff line change
Expand Up @@ -182,3 +182,43 @@ end
scpiCommand(::typeof(DIO), pin) = string("RP:DIO:", DIOPinToCommand(pin), "?")
scpiReturn(::typeof(DIO)) = String
parseReturn(::typeof(DIO), ret) = occursin("ON", ret)






export DIOHBridge!
"""
DIOHBridge!(rp::RedPitaya, pin::DIOPins, val::Bool)

Set the value of DIOHBridge pin `pin` to the value `val`.
# Example
```julia
julia> DIOHBridge!(rp, DIO7_P, true)
true
```
"""
function DIOHBridge!(rp::RedPitaya, pin, val)
return query(rp, scpiCommand(DIOHBridge!, pin, val), scpiReturn(DIOHBridge!))
end
scpiCommand(::typeof(DIOHBridge!), pin::DIOPins, val::Bool) = string("RP:DIO:", DIOPinToCommand(pin), ":HBRIDGE ", (val ? "ON" : "OFF"))
scpiReturn(::typeof(DIOHBridge!)) = Bool

export DIOHBridge
"""
DIOHBridge(rp::RedPitaya, pin::DIOPins)

Get the value of DIOHBridge pin `pin`.
# Example
```julia
julia>DIOHBridge(rp, DIO7_P)
true
```
"""
function DIOHBridge(rp::RedPitaya, pin)
return parseReturn(DIOHBridge, query(rp, scpiCommand(DIOHBridge, pin), scpiReturn(DIOHBridge)))
end
scpiCommand(::typeof(DIOHBridge), pin) = string("RP:DIO:", DIOPinToCommand(pin), ":HBRIDGE?")
scpiReturn(::typeof(DIOHBridge)) = String
parseReturn(::typeof(DIOHBridge), ret) = occursin("ON", ret)
1 change: 1 addition & 0 deletions src/examples/julia/config.jl
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
# URLs= ["rp-f08ccb.local", "rp-f08caa.local"]
URLs= ["192.168.1.100"]#, "192.168.2.17"]
# URLs= ["192.168.178.65"]#, "192.168.178.95"]
mkpath("images")
78 changes: 78 additions & 0 deletions src/examples/julia/resync.jl
Original file line number Diff line number Diff line change
@@ -0,0 +1,78 @@
using RedPitayaDAQServer
using CairoMakie

# obtain the URL of the RedPitaya
include("config.jl")

rp = RedPitaya(URLs[1])
serverMode!(rp, CONFIGURATION)

dec = 32
modulus = 124800
base_frequency = 125000000
periods_per_step = 5
samples_per_period = div(modulus, dec)
periods_per_frame = 50
frame_period = dec*samples_per_period*periods_per_frame / base_frequency
steps_per_frame = div(50, periods_per_step)

decimation!(rp, dec)
samplesPerPeriod!(rp, samples_per_period)
periodsPerFrame!(rp, periods_per_frame)

for i in 1:2
frequencyDAC!(rp, i, 1, base_frequency / modulus)
signalTypeDAC!(rp, i, 1, "SINE")
amplitudeDAC!(rp, i, 1, 0.2)
phaseDAC!(rp, i, 1, 0)
end
triggerMode!(rp, INTERNAL)

# Sequence Configuration
clearSequence!(rp)
stepsPerFrame!(rp, steps_per_frame)
seqChan!(rp, 2)
lut = reshape(fill(0.0f0, steps_per_frame), 1, :)
lut = repeat(lut, outer = 2)
enable = collect(fill(true, steps_per_frame))
enable = reshape(enable, 1, :)
enable = repeat(enable, outer = 2)
# In the last step of each frame we resync the DACs
resync = vcat(fill(false, steps_per_frame - 1), [true])
resync = reshape(resync, 1, :)
resync = repeat(resync, outer = 2)
seq = SimpleSequence(lut, 2, enable, resync)
sequence!(rp, seq)

samples_per_frame = samples_per_period * periods_per_frame
target = samples_per_frame * 0.3 # After a third of a frame we want to switch frequency

serverMode!(rp, ACQUISITION)
masterTrigger!(rp, true)

# Wait until we reach the target sample
curr = currentWP(rp)
while curr < target
# NOP
global curr = currentWP(rp)
sleep(0.01)
end

# Update the phase and frequency of the second channel
frequencyDAC!(rp, 2, 1, base_frequency / (2*modulus))
phaseDAC!(rp, 2, 1, pi)

data = readFrames(rp, 0, 2)

masterTrigger!(rp, false)
serverMode!(rp, CONFIGURATION)


fig = Figure()
lines(fig[1, 1], vec(data[:, 2, :, 1]), axis = (ylabel = "First Frame", title = "All Periods"))
lines(fig[1, 2], vec(data[:, 2, 1:5, 1]), axis = (ylabel = "First Frame", title = "First Periods"))
lines(fig[2, 1], vec(data[:, 2, :, 2]), axis = (ylabel = "Second Frame",))
lines(fig[2, 2], vec(data[:, 2, 1:5, 2]), axis = (ylabel = "Second Frame",))

save(joinpath(@__DIR__(), "images", "resync.png"), fig)
fig
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