Add lib, server and client FPGA image version query

tknopp · Dec 1, 2023 · 4b5878a · 4b5878a
1 parent 95aa670
commit 4b5878a
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Showing 4 changed files with 28 additions and 1 deletion.
diff --git a/src/client/julia/src/RedPitayaDAQServer.jl b/src/client/julia/src/RedPitayaDAQServer.jl
@@ -164,6 +164,12 @@ function connect(rp::RedPitaya)
       if length(temp) > 0
         @warn "RP $(rp.host): Channels $(string(temp)) have a small DAC scale calibration value. If this is not intended use calibDACScale!(rp, i, 1.0) to set a default scale."
       end
+
+      imageVersion = imgversion(rp)
+      packageVersion = pkgversion(@__MODULE__)
+      if packageVersion.minor != imageVersion
+        @warn "RedPitayaDAQServer (minor) client version ($packageVersion) differs from FPGA image version ($imageVersion). Incompatible (minor) versions can result in undefined behaviour"
+      end
     end
   end
 end
@@ -203,6 +209,10 @@ function stringToEnum(enumType::Type{T}, value::AbstractString) where {T <: Enum
   return instances(enumType)[index]
 end
 
+imgversion(rp::RedPitaya) = query(rp, scpiCommand(imgversion), scpiReturn(imgversion))
+scpiCommand(::typeof(imgversion)) = "RP:VER:IMG?"
+scpiReturn(::typeof(imgversion)) = UInt32
+
 """
     ServerMode
 

diff --git a/src/lib/rp-daq-lib.c b/src/lib/rp-daq-lib.c
@@ -91,6 +91,11 @@ bool isZynq7045() {
 	return (getFPGAId() == 0x11);
 }
 
+
+uint32_t getFPGAImageVersion() {
+	return *version_sts;
+}
+
 void loadBitstream() {
 	if(!access("/tmp/bitstreamLoaded", F_OK )){
 		printf("Bitfile already loaded\n");
@@ -150,9 +155,13 @@ int init() {
 	xadc = mmap(NULL, 16*sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, mmapfd, 0x40010000);
 	awg_0_cfg = mmap(NULL, AWG_BUFF_SIZE*sizeof(uint32_t)/2, PROT_READ|PROT_WRITE, MAP_SHARED, mmapfd, 0x80020000);
 	awg_1_cfg = mmap(NULL, AWG_BUFF_SIZE*sizeof(uint32_t)/2, PROT_READ|PROT_WRITE, MAP_SHARED, mmapfd, 0x80028000);
+	version_sts  = mmap(NULL, sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, mmapfd, 0x40009000);
+
+
 
 	loadBitstream();
-
+	printf("FPGA Image Version %u\n", getFPGAImageVersion());
+
 	calib_Init(); // Load calibration from EEPROM
 	calib_validate(&calib);
 	printf("Using calibration version %d with: %u\n", calib.version, calib.set_flags);

diff --git a/src/lib/rp-daq-lib.h b/src/lib/rp-daq-lib.h
@@ -68,6 +68,7 @@ extern uint32_t *counter_trigger_cfg, *counter_trigger_sts;
 extern uint16_t *pdm_cfg;
 extern uint64_t *adc_sts, *dac_cfg; 
 extern uint32_t *awg_0_cfg, *awg_1_cfg;
+extern uint32_t *version_sts;
 
 // init routines
 extern uint32_t getFPGAId();
@@ -78,6 +79,7 @@ extern bool isZynq7030();
 extern bool isZynq7045();
 extern int init();
 extern void loadBitstream();
+extern uint32_t getFPGAImageVersion();
 
 // fast DAC
 extern uint16_t getAmplitude(int, int);

diff --git a/src/server/scpi_commands.c b/src/server/scpi_commands.c
@@ -75,6 +75,11 @@ scpi_choice_def_t server_modes[] = {
 	SCPI_CHOICE_LIST_END
 };
 
+static scpi_result_t RP_GetImageVersion(scpi_t * context) {
+	SCPI_ResultUInt32(context, getFPGAImageVersion());
+	return SCPI_RES_OK;
+}
+
 static scpi_result_t RP_GetServerMode(scpi_t * context) {
 	const char * name;
 	SCPI_ChoiceToName(server_modes, getServerMode(), &name);
@@ -1700,6 +1705,7 @@ const scpi_command_t scpi_commands[] = {
 	{.pattern = "STATus:PRESet", .callback = SCPI_StatusPreset,},
 
 	/* RP-DAQ */
+	{.pattern = "RP:VERsion:IMaGe?", .callback = RP_GetImageVersion,},
 	{.pattern = "RP:MODe?", .callback = RP_GetServerMode,},
 	{.pattern = "RP:MODe", .callback = RP_SetServerMode,},
 	// DAC