IntelFsp2WrapperPkg/FspiWrapperPeim : Support dispatch mode

Add FSP-SMM code for dispatch mode. Signed-off-by: Hongbin1 Zhang <[email protected]> Cc: Chasel Chiu <[email protected]> Cc: Nate DeSimone <[email protected]> Cc: Duggapu Chinni B <[email protected]> Cc: Chen Gang C <[email protected]> Cc: Star Zeng <[email protected]> Cc: Ted Kuo <[email protected]> Cc: Ashraf Ali S <[email protected]> Cc: Ray Ni <[email protected]>
tianocore · Oct 9, 2024 · 5a0c215 · 5a0c215
1 parent 69696f5
commit 5a0c215
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Showing 3 changed files with 72 additions and 3 deletions.
diff --git a/IntelFsp2WrapperPkg/FspiWrapperPeim/FspiWrapperPeim.c b/IntelFsp2WrapperPkg/FspiWrapperPeim/FspiWrapperPeim.c
@@ -10,7 +10,64 @@
 
 #include <PiPei.h>
 #include <Library/PeimEntryPoint.h>
+#include <Library/PeiServicesLib.h>
 #include <Library/PeiServicesTablePointerLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Ppi/FirmwareVolumeInfoMeasurementExcluded.h>
+
+/**
+  Do FSP SMM initialization in Dispatch mode.
+
+  @retval FSP SMM initialization status.
+**/
+EFI_STATUS
+EFIAPI
+FspiWrapperInitDispatchMode (
+  VOID
+  )
+{
+  EFI_STATUS                                             Status;
+  EFI_PEI_FIRMWARE_VOLUME_INFO_MEASUREMENT_EXCLUDED_PPI  *MeasurementExcludedFvPpi;
+  EFI_PEI_PPI_DESCRIPTOR                                 *MeasurementExcludedPpiList;
+
+  MeasurementExcludedFvPpi = AllocatePool (sizeof (*MeasurementExcludedFvPpi));
+  ASSERT (MeasurementExcludedFvPpi != NULL);
+  if (MeasurementExcludedFvPpi == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  MeasurementExcludedFvPpi->Count          = 1;
+  MeasurementExcludedFvPpi->Fv[0].FvBase   = PcdGet32 (PcdFspiBaseAddress);
+  MeasurementExcludedFvPpi->Fv[0].FvLength = ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspiBaseAddress))->FvLength;
+
+  MeasurementExcludedPpiList = AllocatePool (sizeof (*MeasurementExcludedPpiList));
+  ASSERT (MeasurementExcludedPpiList != NULL);
+  if (MeasurementExcludedPpiList == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  MeasurementExcludedPpiList->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+  MeasurementExcludedPpiList->Guid  = &gEfiPeiFirmwareVolumeInfoMeasurementExcludedPpiGuid;
+  MeasurementExcludedPpiList->Ppi   = MeasurementExcludedFvPpi;
+
+  Status = PeiServicesInstallPpi (MeasurementExcludedPpiList);
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // FSP-I Wrapper running in Dispatch mode and reports FSP-I FV to PEI dispatcher.
+  //
+  PeiServicesInstallFvInfoPpi (
+    &((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspiBaseAddress))->FileSystemGuid,
+    (VOID *)(UINTN)PcdGet32 (PcdFspiBaseAddress),
+    (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspiBaseAddress))->FvLength,
+    NULL,
+    NULL
+    );
+
+  return Status;
+}
 
 /**
   This is the entrypoint of PEIM.
@@ -27,6 +84,11 @@ FspiWrapperPeimEntryPoint (
   IN CONST EFI_PEI_SERVICES     **PeiServices
   )
 {
+  EFI_STATUS  Status;
+
+  DEBUG ((DEBUG_INFO, "FspiWrapperPeimEntryPoint\n"));
+
+  Status = FspiWrapperInitDispatchMode ();
 
-  return EFI_SUCCESS;
+  return Status;
 }
diff --git a/IntelFsp2WrapperPkg/FspiWrapperPeim/FspiWrapperPeim.inf b/IntelFsp2WrapperPkg/FspiWrapperPeim/FspiWrapperPeim.inf
@@ -30,19 +30,25 @@
   PeimEntryPoint
   PeiServicesLib
   PeiServicesTablePointerLib
+  DebugLib
+  MemoryAllocationLib
 
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  SecurityPkg/SecurityPkg.dec
+  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
 
 [Ppis]
+  gEfiPeiFirmwareVolumeInfoMeasurementExcludedPpiGuid    ## PRODUCES
 
 [Pcd]
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspiBaseAddress       ## CONSUMES
 
 [Guids]
 
 [Sources]
   FspiWrapperPeim.c
 
 [Depex]
-  TRUE
+  gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
@@ -98,10 +98,11 @@
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A
 
   #
-  ## These are the base address of FSP-M/S
+  ## These are the base address of FSP-M/S/I
   #
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspiBaseAddress|0x00000000|UINT32|0x00001002
   #
   # To provide flexibility for platform to pre-allocate FSP UPD buffer
   #