Enable Linux GCC builds on AlderlakeOpenBoardPkg

Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPreMemLib.c

@@ -146,8 +146,6 @@ AdlPBoardInitBeforeMemoryInit (
   VOID
   )
 {
-  EFI_STATUS        Status;
-
   DEBUG ((DEBUG_INFO, "AdlPBoardInitBeforeMemoryInit\n"));
 
   AdlPInitPreMem ();
@@ -156,7 +154,7 @@ AdlPBoardInitBeforeMemoryInit (
 
   AdlPMrcConfigInit ();
   AdlPSaMiscConfigInit ();
-  Status = AdlPRootPortClkInfoInit ();
+  AdlPRootPortClkInfoInit ();
   AdlPSaDisplayConfigInit ();
   if (PcdGetPtr (PcdBoardGpioTableEarlyPreMem) != 0) {
     GpioInit (PcdGetPtr (PcdBoardGpioTableEarlyPreMem));

Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecRamInitData.c

@@ -46,10 +46,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD FsptUpdDataPtr = {
     FixedPcdGet8 (PcdSerialIoUartMode),
     0,
     FixedPcdGet32 (PcdSerialIoUartBaudRate),
-    FixedPcdGet64 (PcdPciExpressBaseAddress),
-    {
-      0x00
-    }
+    FixedPcdGet64 (PcdPciExpressBaseAddress)
   },
   { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
   },

Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec

@@ -297,7 +297,7 @@ gBoardModuleTokenSpaceGuid.PcdDisableVpdGpioTable|FALSE|BOOLEAN|0x50000015
   <Packages>
     MdePkg/MdePkg.dec
     AlderlakeSiliconPkg/SiPkg.dec
-    AlderLakeOpenBoardPkg/OpenBoardPkg.dec
+    AlderlakeOpenBoardPkg/OpenBoardPkg.dec
 }
 [PcdsDynamic, PcdsDynamicEx]
 

Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.c

@@ -74,7 +74,7 @@ SaPolicyInitDxe (
   // Call CreateSaDxeConfigBlocks to create & initialize platform policy structure
   // and get all Intel default policy settings.
   //
-  Status = CreateSaDxeConfigBlocks (&SaPolicy);
+  Status = CreateSaDxeConfigBlocks ((VOID **) &SaPolicy);
   DEBUG ((DEBUG_INFO, "SaPolicy->TableHeader.NumberOfBlocks = 0x%x\n ", SaPolicy->TableHeader.NumberOfBlocks));
   ASSERT_EFI_ERROR (Status);
 

Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdatePreMem.c

@@ -42,25 +42,13 @@ UpdatePeiCpuPolicyPreMem (
   CPU_CONFIG_LIB_PREMEM_CONFIG    *CpuConfigLibPreMemConfig;
   SI_PREMEM_POLICY_PPI            *SiPreMemPolicyPpi;
   UINT32                          MaxLogicProcessors;
-  UINT16                          BiosSize;
-  UINT16                          BiosMemSizeInMb;
-  FW_BOOT_MEDIA_TYPE              FwBootMediaType;
   MSR_CORE_THREAD_COUNT_REGISTER  MsrCoreThreadCount;
-  UINT8                           AllCoreCount;
-  UINT8                           AllSmallCoreCount;
-  UINT32                          DisablePerCoreMask;
 
   DEBUG ((DEBUG_INFO, "Update PeiCpuPolicyUpdate Pre-Mem Start\n"));
 
   SiPreMemPolicyPpi           = NULL;
   CpuSecurityPreMemConfig     = NULL;
   CpuConfigLibPreMemConfig    = NULL;
-  BiosSize                    = 0;
-  BiosMemSizeInMb             = 0;
-  FwBootMediaType             = FwBootMediaMax;
-  AllCoreCount                = 0;
-  AllSmallCoreCount           = 0;
-  DisablePerCoreMask          = 0;
 
   Status = PeiServicesLocatePpi (&gSiPreMemPolicyPpiGuid, 0, NULL, (VOID **) &SiPreMemPolicyPpi);
   ASSERT_EFI_ERROR (Status);

Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c

@@ -188,17 +188,11 @@ UpdatePeiPchPolicy (
   EFI_STATUS                      Status;
   VOID                            *FspsUpd;
   SI_POLICY_PPI                   *SiPolicy;
-  VOID                            *FspmUpd;
-  SI_PREMEM_POLICY_PPI            *SiPreMemPolicyPpi;
-  CPU_SECURITY_PREMEM_CONFIG      *CpuSecurityPreMemConfig;
 
   DEBUG ((DEBUG_INFO, "Update PeiPchPolicyUpdate Pos-Mem Start\n"));
 
   FspsUpd                 = NULL;
-  FspmUpd                 = NULL;
   SiPolicy                = NULL;
-  CpuSecurityPreMemConfig = NULL;
-  SiPreMemPolicyPpi       = NULL;
 
   Status = PeiServicesLocatePpi (&gSiPolicyPpiGuid, 0, NULL, (VOID **) &SiPolicy);
   ASSERT_EFI_ERROR (Status);

Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSaPolicyUpdate.c

@@ -102,7 +102,6 @@ UpdatePeiSaPolicy (
   VOID                            *VmdVariablePtr;
   GRAPHICS_PEI_CONFIG             *GtConfig;
   SI_POLICY_PPI                   *SiPolicyPpi;
-  CPU_PCIE_CONFIG                 *CpuPcieRpConfig;
   VMD_PEI_CONFIG                  *VmdPeiConfig;
   EFI_PEI_PPI_DESCRIPTOR          *ReadyForGopConfigPpiDesc;
   VOID                            *VbtPtr;
@@ -119,7 +118,6 @@ UpdatePeiSaPolicy (
 
   GtConfig              = NULL;
   SiPolicyPpi           = NULL;
-  CpuPcieRpConfig       = NULL;
   VmdVariablePtr        = NULL;
   Buffer     = NULL;
 

Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSaPolicyUpdatePreMem.c

@@ -69,28 +69,23 @@ UpdatePeiSaPolicyPreMem (
   UINT64                                          PlatformMemorySize;
   VOID                                            *MemorySavedData;
   VOID                                            *NullSpdPtr;
-  UINT32                                          RpEnabledMask;
   SI_PREMEM_POLICY_PPI                            *SiPreMemPolicyPpi;
   MEMORY_CONFIGURATION                            *MemConfig;
   SA_MISC_PEI_PREMEM_CONFIG                       *MiscPeiPreMemConfig;
   MEMORY_CONFIG_NO_CRC                            *MemConfigNoCrc;
   EFI_PEI_PPI_DESCRIPTOR                          *FspmArchConfigPpiDesc;
   FSPM_ARCH_CONFIG_PPI                            *FspmArchConfigPpi;
   HOST_BRIDGE_PREMEM_CONFIG                       *HostBridgePreMemConfig;
-  UINT16                                          AdjustedMmioSize;
   UINT8                                           SaDisplayConfigTable[16];
-  EFI_BOOT_MODE                                   SysBootMode;
   UINT32                                          ProcessorTraceTotalMemSize;
   CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX     Ebx;
   UINT32                                          CapsuleSupportMemSize;
 
   DEBUG ((DEBUG_INFO, "Update PeiSaPolicyUpdate Pre-Mem Start\n"));
   ZeroMem ((VOID*) SaDisplayConfigTable, sizeof (SaDisplayConfigTable));
   WdtTimeout           = 0;
-  SysBootMode          = 0;
   RcompData            = NULL;
   PlatformMemorySize   = 0;
-  RpEnabledMask        = 0;
   SiPreMemPolicyPpi    = NULL;
   MemConfig            = NULL;
   MemConfigNoCrc       = NULL;
@@ -103,8 +98,6 @@ UpdatePeiSaPolicyPreMem (
   ProcessorTraceTotalMemSize = 0;
   CapsuleSupportMemSize = 0;
 
-  AdjustedMmioSize = PcdGet16 (PcdSaMiscMmioSizeAdjustment);
-
   Status = PeiServicesLocatePpi (&gSiPreMemPolicyPpiGuid, 0, NULL, (VOID **) &SiPreMemPolicyPpi);
   ASSERT_EFI_ERROR (Status);
 

Platform/Intel/build.cfg

@@ -71,4 +71,4 @@ WilsonCityRvp = WhitleyOpenBoardPkg/WilsonCityRvp/build_config.cfg
 BoardTiogaPass = PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
 JunctionCity = WhitleyOpenBoardPkg/JunctionCity/build_config.cfg
 Aowanda = WhitleyOpenBoardPkg/Aowanda/build_config.cfg
-AlderLakePRvp = AlderLakeOpenBoardPkg/AlderLakePRvp/build_config.cfg
+AlderlakePRvp = AlderlakeOpenBoardPkg/AlderlakePRvp/build_config.cfg

Platform/Intel/build_bios.py

@@ -924,9 +924,15 @@ def get_config():
         :returns: The config defined in the the Build.cfg file
         :rtype: Dictionary
     """
+    path = 'build.cfg'
+    if not os.path.isfile(path):
+        path = os.path.dirname(__file__)
+        path = os.path.join(path, 'build.cfg')
+        if not os.path.isfile(path):
+            raise IOError("Config file {} not found".format())
     config_file = configparser.RawConfigParser()
     config_file.optionxform = str
-    config_file.read('build.cfg')
+    config_file.read(path)
     config_dictionary = {}
     for section in config_file.sections():
         dictionary = dict(config_file.items(section))
@@ -949,6 +955,11 @@ def get_platform_config(platform_name, config_data):
 
     platform_data = config_data.get("PLATFORMS")
     path = platform_data.get(platform_name)
+    if not os.path.isfile(path):
+        path = os.path.dirname(__file__)
+        path = os.path.join(path, platform_data.get(platform_name))
+        if not os.path.isfile(path):
+            raise IOError("Config file {} not found".format())
     config_file = configparser.RawConfigParser()
     config_file.optionxform = str
     config_file.read(path)

Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.c

@@ -19,8 +19,6 @@
 #include <IndustryStandard/Pci22.h>
 #include <Register/IgdRegs.h>
 
-
-STATIC CONST CHAR8 mAdlCpuFamilyString[] = "AlderLake";
 typedef struct {
   UINT32  CPUID;
   UINT8   CpuSku;

Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf

@@ -42,3 +42,6 @@ GpioLib.c
 GpioNativeLib.c
 GpioInit.c
 GpioLibrary.h
+
+[BuildOptions]
+  GCC:*_*_*_CC_FLAGS = -Wno-unused-function

Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h

@@ -143,17 +143,6 @@ IsSpiFlashWriteGranted (
   VOID
   );
 
-/**
-  Check if a save and restore of the SPI controller state is necessary
-
-  @retval TRUE    It's necessary to save and restore SPI controller state
-  @retval FALSE   It's not necessary to save and restore SPI controller state
-**/
-BOOLEAN
-IsSpiControllerSaveRestoreEnabled (
-  VOID
-  );
-
 /**
   Read data from the flash part.
 

Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Library/PeiSpiLib/PchSpi.c

@@ -193,17 +193,3 @@ IsSpiFlashWriteGranted (
 {
   return TRUE;
 }
-
-/**
-  Check if a save and restore of the SPI controller state is necessary
-
-  @retval TRUE    It's necessary to save and restore SPI controller state
-  @retval FALSE   It's not necessary to save and restore SPI controller state
-**/
-BOOLEAN
-IsSpiControllerSaveRestoreEnabled (
-  VOID
-  )
-{
-  return FALSE;
-}

Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c

@@ -433,45 +433,6 @@ WaitForSpiCycleComplete (
   return FALSE;
 }
 
-/**
-  This function waits for a pending SPI transaction to complete without clearing
-  status fields
-
-  @param[in] This                 Pointer to the PCH_SPI2_PROTOCOL instance.
-  @param[in] PchSpiBar0           SPI MMIO address
-
-  @retval TRUE                    SPI cycle completed on the interface.
-  @retval FALSE                   Time out while waiting the SPI cycle to complete.
-                                  It's not safe to program the next command on the SPI interface.
-**/
-BOOLEAN
-STATIC
-WaitForScipNoClear (
-  IN      PCH_SPI2_PROTOCOL   *This,
-  IN      UINTN               PchSpiBar0
-  )
-{
-  UINT64        WaitTicks;
-  UINT64        WaitCount;
-  SPI_INSTANCE  *SpiInstance;
-  UINT32        Data32;
-
-  SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
-
-  //
-  // Wait for the SPI cycle to complete.
-  //
-  WaitCount = SPI_WAIT_TIME / SPI_WAIT_PERIOD;
-  for (WaitTicks = 0; WaitTicks < WaitCount; WaitTicks++) {
-    Data32 = MmioRead32 (PchSpiBar0 + R_SPI_MEM_HSFSC);
-    if ((Data32 & B_SPI_MEM_HSFSC_SCIP) == 0) {
-      return TRUE;
-    }
-    PchPmTimerStallRuntimeSafe (SpiInstance->PchAcpiBase, SPI_WAIT_PERIOD);
-  }
-  return FALSE;
-}
-
 /**
   This function sends the programmed SPI command to the device.
 
@@ -498,7 +459,6 @@ SendSpiCmd (
   IN OUT UINT8              *Buffer
   )
 {
-  UINT32          FdataSave[16];
   EFI_STATUS      Status;
   UINT32          Index;
   SPI_INSTANCE    *SpiInstance;
@@ -512,11 +472,6 @@ SendSpiCmd (
   UINT32          SmiEnSave;
   UINT16          ABase;
   UINT32          HsfstsCtl;
-  UINT32          FaddrSave;
-  UINT32          HsfscSave;
-  BOOLEAN         HsfscFdoneSave;
-  BOOLEAN         HsfscFcerrSave;
-  BOOLEAN         RestoreState;
 
   //
   // For flash write, there is a requirement that all CPU threads are in SMM
@@ -532,7 +487,6 @@ SendSpiCmd (
   SpiInstance       = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
   SpiBaseAddress    = SpiInstance->PchSpiBase;
   ABase             = SpiInstance->PchAcpiBase;
-  RestoreState      = FALSE;
 
   //
   // Disable SMIs to make sure normal mode flash access is not interrupted by an SMI
@@ -570,25 +524,6 @@ SendSpiCmd (
       );
   }
 
-  //
-  // Save current SPI controller state
-  //
-  if (IsSpiControllerSaveRestoreEnabled ()) {
-    if (!WaitForScipNoClear (This, PchSpiBar0)) {
-      Status = EFI_DEVICE_ERROR;
-      goto SendSpiCmdEnd;
-    }
-    HsfscSave       = MmioRead32 (PchSpiBar0 + R_SPI_MEM_HSFSC);
-    HsfscFdoneSave  = ((HsfscSave & B_SPI_MEM_HSFSC_FDONE) != 0) ? TRUE : FALSE;
-    HsfscFcerrSave  = ((HsfscSave & B_SPI_MEM_HSFSC_FCERR) != 0) ? TRUE : FALSE;
-    HsfscSave      &= B_SPI_MEM_HSFSC_SAVE_MASK;
-    FaddrSave       = MmioRead32 (PchSpiBar0 + R_SPI_MEM_FADDR);
-    for (Index = 0; Index < 64; Index += sizeof (UINT32)) {
-      FdataSave[Index >> 2] = MmioRead32 (PchSpiBar0 + R_SPI_MEM_FDATA00 + Index);
-    }
-    RestoreState = TRUE;
-  }
-
   //
   // Make sure it's safe to program the command.
   //