Add memory ordering instruction FENCE #464
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jserv
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Jun 28, 2024
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Benchmarks
| Benchmark suite | Current: 50bc9d8 | Previous: ebe8a63 | Ratio |
|---|---|---|---|
Dhrystone |
5 Average DMIPS over 10 runs |
5.22 Average DMIPS over 10 runs |
1.04 |
Coremark |
0.004 Average iterations/sec over 10 runs |
0.004 Average iterations/sec over 10 runs |
1 |
This comment was automatically generated by workflow using github-action-benchmark.
The RV32I memory ordering instruction FENCE is used to order device I/O and memory accesses as viewed by other RISC-V harts and external devices or coprocessors. Linux kernel leverage this instruction for synchronization, support emulating this instruction is needed to boot Linux kernel. The implemention of this instruction is straight forward since there is only single hart at present. Related: sysprog21#310
jserv
changed the title
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Thank @ChinYikMing for contributing! |
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The RV32I memory ordering instruction FENCE is used to order device I/O and memory accesses as viewed by other RISC-V harts and external devices or coprocessors. Linux kernel leverage this instruction for synchronization, support emulating this instruction is needed to boot Linux kernel. The implemention of this instruction is straight forward since there is only single hart at present.
Related: #310