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style(wb55): Apply astyle formating rules
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@nedseb
nedseb committed Oct 1, 2024
1 parent 4f98093 commit 7cdd169
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Showing 2 changed files with 132 additions and 132 deletions.
214 changes: 107 additions & 107 deletions variants/STM32WBxx/WB55R(C-E-G)V/variant_STEAM32_WB55RG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -19,60 +19,60 @@
// Pin number
// Pin number
const PinName digitalPin[] = {
PC_4, // D0/A1
PA_5, // D1/A3
PC_5, // D2/A5
PA_2, // D3/A0
PA_4, // D4/A2
PA_7, // D5
PC_3, // D6
PA_9, // D7
PA_15, // D8
PC_2, // D9
PA_6, // D10/A4
PA_8, // D11
PC_6, // D12
PB_13, // D13
PB_14, // D14
PB_15, // D15
PE_4, // D16
PC_1, // D17
PC_0, // D18
PB_2, // D19
PD_0, // D20
PB_8, // D21
PB_9, // D22
PC_13, // D23
PB_12, // D24
PB_0, // D25
PD_1, // D26
PB_6, // D27
PB_7, // D28
PC_10, // D29
PH_3, // D30
PC_11, // D31
PC_12, // D32
PA_0, // D33
PA_3, // D34
PA_10, // D35
PA_12, // D36
PB_1, // D37
PB_10, // D38
PB_11, // D39
PA_11, // D40
PB_4, // D41
PB_5, // D42
PA_1, // D43
PC_4, // D0/A1
PA_5, // D1/A3
PC_5, // D2/A5
PA_2, // D3/A0
PA_4, // D4/A2
PA_7, // D5
PC_3, // D6
PA_9, // D7
PA_15, // D8
PC_2, // D9
PA_6, // D10/A4
PA_8, // D11
PC_6, // D12
PB_13, // D13
PB_14, // D14
PB_15, // D15
PE_4, // D16
PC_1, // D17
PC_0, // D18
PB_2, // D19
PD_0, // D20
PB_8, // D21
PB_9, // D22
PC_13, // D23
PB_12, // D24
PB_0, // D25
PD_1, // D26
PB_6, // D27
PB_7, // D28
PC_10, // D29
PH_3, // D30
PC_11, // D31
PC_12, // D32
PA_0, // D33
PA_3, // D34
PA_10, // D35
PA_12, // D36
PB_1, // D37
PB_10, // D38
PB_11, // D39
PA_11, // D40
PB_4, // D41
PB_5, // D42
PA_1, // D43
};

// Analog (Ax) pin number array
const uint32_t analogInputPin[] = {
3, // A0
0, // A1
4, // A2
1, // A3
10, // A4
2 // A5
3, // A0
0, // A1
4, // A2
1, // A3
10, // A4
2 // A5
};

// ----------------------------------------------------------------------------
Expand All @@ -87,72 +87,72 @@ extern "C" {
*/
WEAK void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};

/* This prevents concurrent access to RCC registers by CPU2 (M0+) */
hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
/* This prevents concurrent access to RCC registers by CPU2 (M0+) */
hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);

__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

/* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
/* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);

/* Initializes the CPU, AHB and APB busses clocks */
RCC_OscInitStruct.OscillatorType =
RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
RCC_OscInitStruct.PLL.PLLN = 16;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/* Initializes the CPU, AHB and APB busses clocks */
RCC_OscInitStruct.OscillatorType =
RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
RCC_OscInitStruct.PLL.PLLN = 16;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}

/* Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
Error_Handler();
}
/* Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
Error_Handler();
}

/* Initializes the peripherals clocks */
/* RNG needs to be configured like in M0 core, i.e. with HSI48 */
PeriphClkInitStruct.PeriphClockSelection =
RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
Error_Handler();
}
/* Initializes the peripherals clocks */
/* RNG needs to be configured like in M0 core, i.e. with HSI48 */
PeriphClkInitStruct.PeriphClockSelection =
RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
Error_Handler();
}

LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
LL_PWR_SMPS_Enable();
LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
LL_PWR_SMPS_Enable();

/* Select HSI as system clock source after Wake Up from Stop mode */
LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
/* Select HSI as system clock source after Wake Up from Stop mode */
LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);

hsem_unlock(CFG_HW_RCC_SEMID);
hsem_unlock(CFG_HW_RCC_SEMID);
}

#ifdef __cplusplus
Expand Down
50 changes: 25 additions & 25 deletions variants/STM32WBxx/WB55R(C-E-G)V/variant_STEAM32_WB55RG.h
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Original file line number Diff line number Diff line change
Expand Up @@ -143,7 +143,7 @@
#define LED4 PH3

#ifndef LED_BUILTIN
#define LED_BUILTIN LED1
#define LED_BUILTIN LED1
#endif

#define LED_BLUE LED1
Expand All @@ -162,7 +162,7 @@
#define UP_BUTTON GP6

#ifndef USER_BTN
#define USER_BTN MENU_BUTTON
#define USER_BTN MENU_BUTTON
#endif

// SPI Definitions
Expand All @@ -178,24 +178,24 @@
// Timer Definitions
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
#ifndef TIMER_TONE
#define TIMER_TONE TIM16
#define TIMER_TONE TIM16
#endif
#ifndef TIMER_SERVO
#define TIMER_SERVO TIM17
#define TIMER_SERVO TIM17
#endif

// UART Definitions
#ifndef SERIAL_UART_INSTANCE
#define SERIAL_UART_INSTANCE 0 // Connected to ST-Link
#define SERIAL_UART_INSTANCE 0 // Connected to ST-Link
#endif

// Default pin used for 'Serial' instance (ex: ST-Link)
// Mandatory for Firmata
#ifndef PIN_SERIAL_RX
#define PIN_SERIAL_RX SERIAL_RX
#define PIN_SERIAL_RX SERIAL_RX
#endif
#ifndef PIN_SERIAL_TX
#define PIN_SERIAL_TX SERIAL_TX
#define PIN_SERIAL_TX SERIAL_TX
#endif

// Only 512k provided for cpu1, so defined the FLASH_PAGE_NUMBER
Expand All @@ -204,7 +204,7 @@

// Extra HAL modules
#if !defined(HAL_QSPI_MODULE_DISABLED)
#define HAL_QSPI_MODULE_ENABLED
#define HAL_QSPI_MODULE_ENABLED
#endif

/* backward compatibility */
Expand All @@ -215,21 +215,21 @@
*----------------------------------------------------------------------------*/

#ifdef __cplusplus
// These serial port names are intended to allow libraries and architecture-neutral
// sketches to automatically default to the correct port name for a particular type
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
//
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
//
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
//
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
//
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
//
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
// pins are NOT connected to anything by default.
#define SERIAL_PORT_MONITOR Serial
#define SERIAL_PORT_HARDWARE Serial1
// These serial port names are intended to allow libraries and architecture-neutral
// sketches to automatically default to the correct port name for a particular type
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
//
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
//
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
//
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
//
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
//
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
// pins are NOT connected to anything by default.
#define SERIAL_PORT_MONITOR Serial
#define SERIAL_PORT_HARDWARE Serial1
#endif

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