Skip to content

Commit

Permalink
Armv7-M parsing less susceptible to spaces
Browse files Browse the repository at this point in the history
Currently SLOTHY is expecting a lot of spaces, in e.g.,
add r0, r1, r2 and won't except them if you omit them
(e.g., add r0,r1,r2).
This commits changes that for all instructions.
  • Loading branch information
mkannwischer committed Dec 8, 2024
1 parent 2ebb278 commit 59b2f2e
Show file tree
Hide file tree
Showing 3 changed files with 123 additions and 123 deletions.
12 changes: 6 additions & 6 deletions examples/naive/armv7m/armv7m_simple0.s
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@

start:
ldr r1, [r0, #4]
add r1, r2, r1
eor.w r1, r1, r3
smlabt r3, r2, r2, r1
asrs r3, r3, #1
str r3, [r0, #4]
ldr r1, [r0, #4]
add r1, r2,r1
eor.w r1,r1, r3
smlabt r3,r2, r2, r1
asrs r3, r3,#1
str r3, [r0,#4]
end:
56 changes: 28 additions & 28 deletions examples/opt/armv7m/armv7m_simple0_opt_m7.s
Original file line number Diff line number Diff line change
@@ -1,33 +1,33 @@

start:
// Instructions: 6
// Expected cycles: 5
// Expected IPC: 1.20
//
// Cycle bound: 5.0
// IPC bound: 1.20
//
// Wall time: 0.02s
// User time: 0.02s
//
// ----- cycle (expected) ------>
// 0 25
// |------------------------|----
ldr r6, [r0, #4] // *.............................
add r6, r2, r6 // .*............................
eor.w r3, r6, r3 // ..*...........................
smlabt r12, r2, r2, r3 // ..*...........................
asrs r3, r12, #1 // ....*.........................
str r3, [r0, #4] // ....*.........................
// Instructions: 6
// Expected cycles: 5
// Expected IPC: 1.20
//
// Cycle bound: 5.0
// IPC bound: 1.20
//
// Wall time: 0.01s
// User time: 0.01s
//
// ----- cycle (expected) ------>
// 0 25
// |------------------------|----
ldr r12, [r0, #4] // *.............................
add r12,r2,r12 // .*............................
eor.w r10,r12,r3 // ..*...........................
smlabt r10,r2,r2,r10 // ..*...........................
asrs r3,r10,#1 // ....*.........................
str r3,[r0,#4] // ....*.........................

// ------ cycle (expected) ------>
// 0 25
// |------------------------|-----
// ldr r1, [r0, #4] // *..............................
// add r1, r2, r1 // .*.............................
// eor.w r1, r1, r3 // ..*............................
// smlabt r3, r2, r2, r1 // ..*............................
// asrs r3, r3, #1 // ....*..........................
// str r3, [r0, #4] // ....*..........................
// ------ cycle (expected) ------>
// 0 25
// |------------------------|-----
// ldr r1, [r0, #4] // *..............................
// add r1, r2,r1 // .*.............................
// eor.w r1,r1, r3 // ..*............................
// smlabt r3,r2, r2, r1 // ..*............................
// asrs r3, r3,#1 // ....*..........................
// str r3, [r0,#4] // ....*..........................

end:
Loading

0 comments on commit 59b2f2e

Please sign in to comment.